Anticipating DAC

The Design Automation Conference is coming up at the end of July in San Francisco. Expect the Silicon Valley crowd to be out in force.

There's been some griping that there's no "Free Monday" this year. Instead, there's an all-days Exhibits Pass available for $50. To me, that seems like a very reasonable proposition. It remains to be seen if this will cause a significant drop in attendance, and if those who won't pay $50 are the ones EDA vendors need to see at their booths.

As the conference approaches, there will be a number of "must-see" lists, and I hope to compile my own. Right now, I don't have a very clear idea about companies to see. I do have some ideas about what may be hot, from my ASIC design implementation-centric point of view.

What Should Be Hot

• Multi-threaded & Multi-core software. Initially, these trails were blazed by startups such as Extreme DA and Sierra Design Automation (now part of Mentor Graphics). Now, all the major EDA vendors are working hard at either developing new products or retrofitting established ones. Richard Goering has had a number of interesting technical posts about how it's going at Cadence.
• Multi-Corner Multi-Mode (MCMM) analysis and optimization. This has also been talked about for a long time. It's always seemed like a good idea, but is becoming more critical at the most advanced processes and design sizes. A key question is how practical this is. What is the performance penalty to go to MCMM? Helping to solve this will be multi-threaded & multi-core software.
• Low Power. Of all the "next big thing" areas of EDA, this has struck me as the most real. There are several viable verification products based on simulation or static analysis. For implementation, there's combinational and sequential clock gating, multi-Vth optimization, and support for voltage and power domain design driven by UPF (or in Cadence's case, CPF ;-)

Ready for Prime-Time?

• I've been doing a lot of reading about variation, and various techniques to account for this. It's a fascinating new way to think about semiconductor performance. But, there is so much that needs to fall into place for statistical techniques to be used in production: tools, libraries, and a new way of thinking about design analysis.

Count Me Skeptical

• ESL. Maybe it's the market I'm involved in, where "QoR", especially performance, trump potential productivity gains at higher-abstraction design levels. This may be more attractive when time to market is everything and the QoR tradeoff not so great.
• RTL analysis & design planning. Again, maybe it's because of where I sit, but you can argue about getting too carried away with analysis at RTL. RTL is the functional description of the design. Implementation can be done "downstream" of that.

So there's a stake in the ground. I'd love to hear your comments on what the hot trends and companies will be in EDA this year. Hope to see you at DAC!

Find Your Parachute's Color on a Library Vacation

I've recommended Nick Corcodilos' Ask the Headhunter web site before for its unorthodox, yet sensible, advice to finding the best job for you. I'd recommend that you sign up for his newsletter on the web site if you like what you see. This week, he describes taking a Library Vacation(tm) for someone contemplating a career (not just job) change. It's an exciting idea!

I've seen a few friends leaving the high-tech industry, and their transition plans sometimes could use more rigor. It seems like everyone wants to get into a "green" or "alternative energy" job! I'm sure that will be big eventually, but it's better to expand your search space, and carefully consider what you would be passionate doing.

Reading Larry's Tea Leaves

Ellison Insists Sun's Sparc Still Has a Future covers statements by Oracle's Larry Ellison stating the acquiring company's belief in proprietary hardware. However, in "reading between the lines", the author suggests that Oracle might seek a big partner to drive the hardware business over the long haul.

This Week in EDA M&A

Rumors are abounding and some EDA share prices are on fire!

• Mentor will buy LogicVision, which adds complementary technology to further strengthen their DFT portfolio.
• And, Synopsys will add to their Analog IP offering by buying MIP's Analog business.

While we anxiously await "other shoes to drop", Chris Edwards provides strategic commentary on The week of the sensible deals.

Coordinated EDA

Does the EDA industry have a roadmap? is a worthy read in its entirety, but I particularly liked

The crises are piling up — software and concurrency, analog/RF, die-package-board and die stacking — and with a fixed number of EDA R&D engineers, we need to stop working on some issues. In the big picture, who wins a power format or current-source model or process variation model war is less critical to semiconductor industry health than consensus, interoperability, and moving on to fundamental design technology challenges.

This is very consistent with the efforts of companies like TSMC to get the EDA industry working cooperatively to solve more problems and add more value, by reducing overlapping development.

Tell Us What You Really Think of Marketing

Richard Returns, Reports on TSMC

Two quick points today:

1. Richard Goering (noted EDA journalist) is back online! He's been covering EDA for a long time and has interesting and credible insights. He's writing a blog for Cadence at Industry Insights.
2. I went to the TSMC Technology Symposium in San Jose last week. I've been going for the last few years. These are great for getting road maps of silicon process and design technologies (TSMC Reference Flow). I wasn't sure how much information I could share from the day, but Richard has solved my problem by writing a comprehensive report TSMC Views R&D As Ticket Out Of Recession.

   One announcement that I'd like to call attention to is TSMC's integrated sign-off flow. I'd like to take a look at it. It's initially created for 65nm sign-off, and sounds like a Reference Flow on steroids. Not only are there "approved" tools, but also recommended scripts (which EDA vendors also provide) and other libraries and technology files -- apparently a complete package. I'm curious to see how it differs from what we currently use. I might learn some new tricks.

Scaling, Integration and the 3D Shuffle

Chris Edwards wrote a great look at the future of semiconductor scaling in The 3D shuffle - Shrinking Violence Blog.

I'm seeing more and more about 3D packaging, using emerging technologies such as Through Silicon Vias (TSV). Might this solve some of the thorny integration issues people are expecting? If 3D is a good answer for Logic + Memory, it may also be a good match for CPU + GPU. Already, in the CPU space, we're seeing a fair amount of package-level multicore integration, rather than "natively" putting all the cores on a single die. For example, check out AMD No Longer Feels the Need to Go “Native” .

Why Oracle Bought Sun?

You heard it here second. Lou Covey blogged in State of the Media: Oracle. Sun. Brilliant. that Oracle's play for Sun is part of a scheme to break into the Hardware or (shudder) EDA industries!

It's a provocative theory, but would leave me very, very surprised if that were Oracle's motivation. Perhaps they could improve the financials of the EDA business, or juice up EDA's database architectures. But more likely, it seems to me is that Oracle is looking for control of software assets like Java and MySQL. The server and chip businesses just seem way beyond Oracle's core competencies. I'd guess those may be spun off or otherwise de-emphasized.

5/7 Larry says they're keeping all the hardware business.

President Obama Emphasizes Engineers' Contributions

President Obama gave a speech this week providing a vision for the American economy. He outlined "pillars" of a new economy built "on rock".

I was heartened to hear the President's recognition of the value of scientists and engineers, and their abilities to contribute to a sound economy:

one of the changes that I would like to see — and I’m going to be talking about this in weeks to come — is once again seeing our best and our brightest commit themselves to making things — engineers, scientists, innovators. For so long, we have placed at the top of our pinnacle folks who can manipulate numbers and engage in complex financial calculations. And that’s good, we need some of that. But you know what we can really use is some more scientists and some more engineers, who are building and making things that we can export to other countries.

-- The Obama Speech on the Economy - Capital Journal - WSJ

Searching for Silicon Valley

(New York Times photo)

Interested in visiting Silicon Valley, or brushing up on your technology industry history? Check out American Journeys - Searching for Silicon Valley; a Place and a State of Mind from the New York Times.

Nano Edutainment

UC Berkeley's considerable contributions to science and engineering range from the creation of SPICE to the The Nano Song Go Bears!

Happy Birthday SPICE

Another day, another birthday. Coming soon is a big one, for SPICE [Wikipedia], one of the very first EDA programs. It is still vibrant and vital today, after 36 years of the semiconductor revolution.

Read more about its history and how it works in Circuit Simulation - Part One - SPICE Turns Thirty-Six. It's a nice article where you will either learn a little circuit theory, or have flashbacks of courses you took a long time ago. I used to be able to do these equations in my sleep. Let's not talk about my "current" capability.

If you'd like to learn more about SPICE, look for the blogger to post more parts in his series. There's also The SPICE Book, authored by one of the SPICE developers.

Happy Birthday RFC

How the Internet Got Its Rules - NYTimes.com celebrates a successful collaboration model that's 40 years old: RFC, or Request for Comments.

these humble documents shape the Internet’s inner workings and have played a significant role in its success

What history! What an achievment! It represents the best of engineering culture, to have an open dialogue to craft the best solution (brainstormimg + compromise). And, it only leaves me wondering, why can't we have more true collaborative standards in our industry?

Why Functional Programming Matters

I've always been a wannabe hardcore software engineer (it was my emphasis for my M.S.), but in reality, am JAPH.

Nevertheless, I enjoy keeping up with new software development methodologies and languages. As far as fluency, I'm in the age of Java and OOP, but I enjoyed this clear explanation of Why Functional Programming Matters in the "Daily Vim" blog.

Even if you aren't interested in new languages just for the sake of it, this snippet shows why it's relevant to strong emerging trends in CPUs, GPUs, and productive programming paradigms:

At this point, the resounding question in your mind is probably, "why bother?" Well, fortunately there's a very strong reason behind all this shifting of methodology, and that's concurrency.

Daily Vim: Goodbye Vim, Hello Emacs

Oh no! What a way to begin the month! Just read of the loss of a fellow traveler, going to the dark side in Daily Vim: Goodbye Daily Vim, Hello Emacs. Emacs, of course, is a prime example of Zawinski's Law.

EDA Industry Update

Sramana Mitra posts her latest financial analysis of the leading EDA vendors at EDA Industry Update.

Some reactions to her points:

• Synopsys is king of the hill. Yes, obviously.
• Cadence should acquire Magma. I could see this happening. That's the kind of thing Cadence has done in the past, and Magma is getting small.
• Bring back Joe Costello. It would certainly energize the industry, but I doubt he'd want to, or that he could fix things alone.

Synopsys Lynx, a New Old Product

I'm at SNUG this week. I'll try to post more of a trip report after the fact. Aart's keynote speech yesterday was very listenable, as always. But I didn't feel there were a lot of major announcements or new insights.

One of the new announcements was a surprise to me: a flow management system called "Lynx". There's no way I can describe it better than harry … the ASIC guy � Synopsys Lynx Design System Debuts at SNUG.

I'm curious to learn more about it -- there's a SNUG session on it tomorrow. I'm a sucker for a pretty GUI, and I love automation. But I wonder how much business opportunity there is for this -- what is the target customer, and what is the value to them? Many large companies may already have something in place. But for a company just starting up a flow, this could be a quick start to "best practices" results.

Just don't call it a Framework!

Real-Time SNUG Tweets

Woz Dances to a Different Beat

Most all of you must be familiar with Steve Wozniak (personal site, Wikipedia article), legendary personal computer designer and Apple Computer co-founder. "Woz" has long been one of my hardware-design idols, alongside geniuses such as Seymour Cray (R.I.P.).

I've followed Woz's trajectory for a long time. I've seen him speak a couple of times, including as a featured guest at the Synopsys Users Group conference a couple of years ago. As a hardware engineer, you can't help but love Woz. He is truly a gifted designer, and his enthusiasm and passion are clear and sincere.

As Apple co-founder, he's a pretty wealthy guy, which gives him the luxury of pursuing whatever wild idea strikes his fancy. He's had a couple of brushes with pop culture (dating an actress/comedianne), but came out in a big way last week with an appearance on Dancing With the Stars.

You can see his debut here Wow! Woz continues to command my respect as a passionate engineer with absolutely no pretense. I can't help but laugh and wonder if this is the best "15 minutes of fame" moment for an electrical engineer, though. Rolling in on a Segway? Pink Boa? Ah, Woz, you really don't care what others think, do you? I love and respect you for that.

Tonight is his second appearance on DWTS. Hopefully it won't be his last. Check him out. And, in solidarity with our engineering brethren everywhere, give him your support. It would be sweet if some hackers got into the phone system and pumped up the votes for his performance. [the roots of Woz's technology wizardry began with "phreaking" phone systems to get free long-distance phone calls!]

SNUG is Coming to San Jose

It's that time of year for my favorite industry conference, SNUG: Synopsys Users Group - San Jose. I'm on the Technical Committee, so I might be biased. I hope to see you there!

At a glance:

SNUG San Jose 2009
March 16 - 18, 2009 

Location: Santa Clara Convention Center 
5001 Great America Parkway
Santa Clara, CA 95054

Here's the schedule. Contact your Synopsys support person or sign up online.

Cost-Reducing IEEE

Two years ago, in better economic times, I wrote a post Wondering about the IEEE, questioning whether being an IEEE member worth the US$140 dues.

Now, of course, the economy is in worse shape, my company is cost-reducing with a vengence, and IEEE membership is up to $169 (a 20% increase by my calculator). To put it politely, what is the IEEE thinking? It's like some government bureacracy run amok, growing on auto-pilot.

All of the concerns about benefits vs. cost, and the unease of not having a home for ASIC design and EDA, still exist. Now the cost has risen much faster than inflation and money is tighter. Time for us to part ways, until "some sunny day". (cue Vera Lynn/Pink Floyd)

Twittering Away EDA

Twitter mania is running wild! (I reserve judgement on whether this is a good thing.) In the early days, Twitter was only a factor in events like the MacWorld keynote, when so many geeks would be riffing on Steve Jobs' speech, it would crash Twitter's servers.

Now, I hear Twitter mentioned on MSNBC every five minutes (weird). And last week, Twitter came to an EDA conference. JL Gray and like-minded attendees "tweeted" their impressions of DVCon in real-time. JL followed up the conference with a recap via that "old-school" platform, blogging: Cool Verification: DVCon 2009 Wrap Up: Attendance.

I followed the DVCon tweet stream from time to time, but I felt you really had to be there. I didn't "get" many of the references, though it sometimes left me wishing for a live webcast to see what the excitement was about. Personally, I think Twitter is too hyped-up. Maybe, when most everyone is carrying a cell phone or MID with low-cost unlimited data access, it will create new ways of interacting and experiencing conferences. But for now, it is something to be figured out by early adopters.

EDA, Dead or Alive

Almost as good as attending the DVCon panel EDA: Dead or Alive? is reading Mike Demler's notes at The World is Analog: EDA: Dead or Alive? Apparently this is the successor to John Cooley's infamous Troublemakers panel.

Peggy said EDA tools are overpriced? Huh! How about giving me a quality product that doesn't crash so often! Makes Microsoft Office look like mission-critical software. [a pet peeve of mine which I hope to expand on in a future post]

Back to School Resources

In this tough economy, we should all be conscious of our inventory of job skills, with an eye on keeping up-to-date and marketable. Thanks to the Web, there's a wealth of training materials available online, such as at TechOnline University Fundamentals. The courses are generally short and practical. Certainly something to check out before buying expensive textbooks or enrolling in traditional classes.

U.S. And India's Tech Dilemma

Sramana Mitra's column in Forbes, U.S. And India's Tech Dilemma echoes some of the concerns I raised in Choice Careers. Although, after recent market carnage, finance careers seem far from a "hot ticket" for now.

A Classic, for Free

Off-topic except for the theme of "free things", Amazon.com is offering a free downloadable mp3 song for Valentine's Day.

You are ready for Valentine's Day, aren't you? Have a good one.

Cadence Links the News

The company may have a lot of turmoil in the executive suite, but Cadence really gets the latest web and social media trends. Cadence NewsLink has more articles and blog posts than you can shake a stick at covering all EDA domains. Their whole web site has a very modern feel, with pretty active blog postings, and easy ways to share links and leave comments to start a conversation.

Keeping the Day Job

To paraphrase real estate huckster Tom Vu , "do you have the guts to get rich blogging?"

Dan Lyons, more famously known as Fake Steve Jobs, wrote Growing Rich by Blogging Is a High-Tech Fairy Tale for his "day job" at newsweek.com.

It gives insight and some figures on the financial opportunities for bloggers. To cut to the chase: there's not a lot of opportunity! Certainly that's not why I blog, though it's nice to imagine the claimed average earnings of $5,060 per year.

It also gave me more insight into Dan Lyons, the person. As often happens, I liked the "fantasy person" Fake Steve Jobs better. I was disappointed to read that getting rich was a big reason for his launching the Fake Steve Jobs blog, which I found absolutely hilarious. Mark me naive for wishing he just wanted to share his creative gift with all of us. You do have a humourous gift, Dan. May you find a way to re-launch it and make a good living while you're at it.

Editor Learning Curves

Tip o' the hat to Daily Vim.

FREE Utility Grab-Bag

Enough the posts about how bad the industry or overall economy is. How about some FREE stuff? You can't pass that up (especially in this economy ;-).

Therefore, I'm highlighting a few useful commands or utility packages that an engineer might use regularly. I plan to follow this up with a post on useful free EDA packages. My "go-to" utilities are

screen

think of it as "text VNC". lightweight and low bandwith. Hey, most of what we do in VNC is textual anyway, right?

putty

rock-solid terminal client to access *nix from Windows

truecrypt

free industrial-strength encryption. Because you'd hate to have your USB drive or notebook PC data fall into the wrong hands.

xargs

*nix command to process a list (e.g., of file names) piped from another command

Cadence CTO Departs

Congratulations to John Blyler on his scoop JB’s Circuit � Cadence CTO Departs? Yes - It’s True. (I saw John's tweet about this early this morning.) The comments indicate that Jim Hogan, a big name from Cadence's past, is back and playing some role at Cadence. I'm curious to get the rest of the story.

Getting Kids Excited about Chip Design

I was at the San Jose Tech Museum of Innovation yesterday to see their US-exclusive Leonardo exhibit. It really drives home what a genius Leonardo da Vinci was. He seemed to know everything knowable as of 1500, and the exhibits make it clear that he was a god of mechanical engineering (among many things).

If he were around today, with what's available with electrical and electronic engineering, imagine what he would have created! Who is the da Vinci of our day?

Besides this featured exhibit, the kids I brought and I explored the other Current Exhibits. I was excited to find displays on semiconductor design and manufacturing in the Silicon Workshop.

The design section is sponsored by Cadence and the EDA Consortium, and has hands-on activities showing what I knew to be logic design and physical design. I was excited to explain to the children how a few simple logic gates could be interconnected to control what actions would start the model car, turn on its lights, etc. And I think they enjoyed it, too.

Ask me again in ten years whether this influenced the kids at all to pursue science or engineering. I think it is a good attempt. Props to Cadence and EDAC for creating this to show what we do and inspire the next generation.

(images linked from The Tech web site)

AMD Cuts a Harbinger?

The story

AMD to slash 1,100 jobs, cut executive salaries (Reuters)

has variously been reported as "just a layoff", or, in this headline, layoffs + executive salary cuts. But if you read the article, the salary cuts apply to everyone who survives the layoff. Exempt employees, which includes engineers and other professionals, will get a 10% pay cut.

Ouch! People would prefer a cut to being laid off, but 10% could be quite a challenge for those who've been good consumers and not such good savers. I'm concerned that these measures will become more common as the economy continues to struggle.

As an aside, the article curiously mentions voluntary pay reduction measures for employees outside North America. What's a "voluntary pay reduction"? Does it mean "sacrifice for the greater good", or "volunteer or else something worse might befall you"?

Top 20 predictions for semis in 2009

Maybe rather than yet another blog post of 2008 review and 2009 predictions, I'll just flag provocative ones like EETimes.com's Top 20 predictions for semis in 2009 by Mark LaPedus.

Some of my favorite points:

• EDA's four large vendors will more than likely survive the year intact. ... Despite Cadence's play for Mentor last year, consolidation among the big four is unlikely because of too much product line overlap.
• The idea that TSMC might buy Cadence (or another large EDA vendor) has been floating around for years. But now that Cadence is on the ropes, is it more realistic? Offering a suite of EDA tools would make TSMC even more attractive to customers. But could TSMC charge as much for the tools as a standalone vendor? Not likely. ... But what if a company from an entirely different space made a play for Cadence just to get its foot in the door in EDA? What if a software company like Autodesk or Oracle decided to make a move? ... It makes for intriguing speculation, and it's not impossible. But it's a long shot at best. After all, who would want to get into the EDA business?
• [Under "Foundry Fools"] In 2009, I also see Samsung emerging as a foundry powerhouse, eventually pitting TSMC vs. Samsung as the leader in the arena.
• In ASICs, IBM Micro will scale back its efforts to few accounts. The same with TI. The big ASIC houses--NEC, Toshiba, and others--will spill more red ink. And the fabless guys--eASIC, eSilicon, Open-Silicon and others--will need to consolidate.
• [Under 450-mm conspiracy] Got some bad news for you Intel: AMD's foundry spin-off, The Foundry Company, is backed by Abu Dhabi. Cash-rich Abu Dhabi can already afford to build 20 450-mm fabs--and fund the equipment vendors as well. So, the joke is on Intel and the other backers of the 450-mm fab--TSMC and Samsung.
• Except for ARM, semi IP vendors will continue to lose money. Look for a wave of mergers in IP. How about a merger between MIPS and Virage?
• In the top-10 chip rankings in 2009, 5 out of the top 10 will end up being fabless. Qualcomm, Broadcom, MediaTek, Nvidia and perhaps another will be in the top 10. Global Unichip is an up and comer. The old line IDMs are sinking.

That's a lot of quoting, but there's even more good stuff in the article. The author definitely "names names" of which companies may fail and which will prevail.

Important Technology Developments of 2008 - Seeking Alpha

Happy New Year, dear readers! This time of year, it's irresistable to look back over the last year, and perhaps venture some forecasts for the coming one. Before I try to put together my own list, here's a list of The 10 Most Important Technology Developments of 2008 that covers technology broadly (not just semiconductors).

Most of the technologies cited are still nascent. While the iPhone is already significant, it's going to be quite a while before we see memristors in our chips. And I'll have to go look up graphine, since I've never heard of that for chip fabrication.

An Engineer's Guide to Dating

Thanks to John Blyler for pointing out these Funny Videos about Engineers

Happy Holidays, everyone! We survived 2008 and here's to a prosperous new year.

JohnB

Choice Careers

Would you advise smart young people to go into Engineering? It's a question our profession often ponders.

Consider the alternatives. Why not use one's attention to detail to become an attorney? Why not use one's mathematical prowess to go into finance? Become a "rocket scientist", a "master of the universe". I hadn't looked seriously at Wall Street careers, but the compensation described in The Reckoning - On Wall Street, Bonuses, Not Profits, Were Real - Series - NYTimes.com is truly staggering:

The bonanza redefined success for an entire generation. Graduates of top universities sought their fortunes in banking, rather than in careers like medicine, engineering or teaching. Wall Street worked its rookies hard, but it held out the promise of rich rewards. In college dorms, tales of 30-year-olds pulling down $5 million a year were legion.

Admittedly, now isn't the best moment to go into finance. Wall Street financiers are going to have to lay low for a while, lick their wounds, and make some pay for the Ponzi scheme(s) that will come out. But in the end, won't it come roaring back? From a monetary perspective, won't it always be more lucrative to be close to where money is changing hands, rather than cooped up in an R&D lab designing the next big thing? I'm not saying it's right, but that seems to be the way it is.

Last EDA Vendor Standing?

Man, there's some ugly financial results being reported by almost all EDA companies lately. Take a look at Sramana Mitra's financial review.

View the full lava chart at Wikinvest

And poor LogicVision is facing a measly $10M takeover offer, as John Ford covers in Merry Christmas… We want your company

Ms. Mitra surveys the current situation of EDA companies in the provocatively titled EDA: Bring Costello Back?. The title of the post alludes to Cadence's vacancy at the top, of course. For those of you too young to remember, Joe Costello was the charismatic and highly energetic CEO of Cadence from its founding through 1997. It's fun to reminisce about EDA's heyday and colorful characters, but it's probably wishful thinking that he'd want to come back and try to revive Cadence's business.

Meanwhile, John Cooley has a list of 47 candidates for Cadence CEO. What do you think about that list? I get his point, that he strongly believes the new leader should be an EDA veteran. But 47 names? Too unfocused. It's almost like he's name-dropping all the EDA executives he knows.

In my opinion, the best candidate might be a proven CEO or top executive of an EDA start-up, or an autonomous General Manager of an EDA company division. The candidate should be strong technically and have a track record of managing and growing the business. Not "just a Sales guy", or some VP who dropped into the company after it was already up and running. Perhaps a founder of the company, with passion and real leadership. Let's hope they find a great leader, both for the industry and the sake of chip designers everywhere.

Let's hope we don't end up with one company dominating the industry. That would be insufferable, like Ernestine the Operator's (monopoly) Telephone Company

How To Be World Class

Amidst the constant news of the struggling macroeconomy and generally bleak news in EDA and related industries, it'd be a good idea to focus on doing something positive.

How To Be World Class is a brief review of the talked-about book Outliers, which I hope you'll find inspirational.

‘Golden’ timing signoff

Ruben Molina of Extreme DA has a well-written article, ‘Golden’ timing signoff – does it correlate to Spice?. Certainly, one cannot argue that we treat SPICE simulation results as "golden" (for a given set of PVT conditions). At the same time, device-level SPICE is a lot harder to work with than gate-level tools such as static timing analyzers. Therefore, as he says, designers looking to qualify a tool may take the easy way out and compare the new tool to the de facto standard, even if the accuracy of the standard tool isn't well understood. SPICE should be the arbiter.

I sometimes feel sorry for new tool vendors going against a well-established "gorilla". They design the fastest, most accurate tool that they can, and then find customers complaining that it doesn't match the idiosyncracies of older tools. To add insult to injury, the aspiring tool vendor may have to add in "compatibility mode" features that produce less accurate or less sensible results, just to correlate to the tool the want to displace.

This has happened in EDA for a long time. Remember when Cadence's Verilog-XL was THE simulation standard? Upstarts, including Chronologic with VCS, couldn't just implement the Verilog spec. Customers forced them to mimic every quirk of Verilog-XL. It was the arbiter, much to competitor's frustration.

In the case of timing tools, it behooves tool vendors to offer a qualification flow. For example, to compare to SPICE, the tool should be able to select timing paths, write out accurate & valid SPICE decks, and make it easy to run the simulations by pointing to the SPICE tool and library models. In this way, it lowers the barrier for customers to compare against the "right" standard, instead of the easy one.

Password Arms Race

The overly paranoid Synopsys Solvnet's insane new password rules highlights what I also found to be ridiculous new password requirements for SolvNet.

I get the feeling that companies with customer web sites are viewing "password ridiculousness" as a measure of how valuable their site content is. Come on, it's just a knowledge base! If the user gets the password wrong after three tries, lock them out. Other than that, why make the password like a nuclear launch code?

Remote Software Debug?

Here's a query for all you software professionals out there: Are there tools or techniques that allow programmers to debug a program remotely? That is, can the executable and its data be on one server, and the source code and the engineer driving the debugger be on another server? This could be two servers in the same farm, or, more interestingly, the program could be running at the customer site, while the debugging is driven from the vendor's site.

I'm not a professional software engineer (just another Perl hacker), but this seems that it ought to be possible. I just don't know how to pull it off.

Two Strategies You Don't Want in Your Business Plan

1. We going to take on Intel head-on
2. Our technology is based on emulation

Novafora to buy once-highflying Transmeta for $256 Million

Transmeta, R.I.P.

Update: The Transmeta Deal: Why? summarizes the head-scratching financial aspect of this deal. Although $256 Million may sound like a lot, it turns out that Transmeta had almost that much cash in the bank! Therefore,

Excluding cash, the company is receiving just over $11 million for its entire portfolio of valuable technology that has been developed over ten years at a cost in excess of $400 million ...

ICCAD Presents Bloggers

We had a great "Birds of a Feather" meeting after ICCAD last evening. Sean Murphy did a superb job organizing and running the meeting. We had a good turnout of bloggers, wannabee bloggers, journalists, consultants, PR folks. Two of the topics that generated a spirited discussion were

1. Are individual bloggers and "corporate" bloggers in different categories? Some in the audience felt that corporate bloggers must feel constraints from their corporate sponsor. Most of the corporate bloggers asserted that they were in fact independent, and could write what they wanted.
2. What's the difference between a journalist and a blogger? This can be debated from many directions. It was even part of a Supreme Court case! From my perspective, they are different. Although journalists can also blog, independent (and part-time) bloggers such as myself find great benefit in dedicated, professional journalism. Many of my posts riff on articles from EETimes or EDN, for example.

   A typical blogger is more like a columnist than a reporter. It's essential to recognize and respect the difference between objective reporting (fair and balanced!) and the offering of opinions.

For the record, here's the "lightning talk" presentation that I gave. I thought I'd share it with my readers, and it's also a chance to try out this slick new Slideshare widget for embedding presentations.

ICCAD Blogging Birds of a Feather

View SlideShare presentation or Upload your own. (tags: cad eda)

Bloggers Flock to ICCAD

Fellow blogger Sean Murphy has organized an EDA Bloggers' Birds of a Feather meeting at the ICCAD conference in San Jose. The conference is going on right now, and the BOF meeting is Wednesday, November 12, 4-6pm.

Whether you write or read blogs or are just interested in EDA, please come join us! It's free, and in this economy, who can pass that up? I'll be one of about eight speakers giving a short talk before the open discussion. I plan to comment on my blogging experience, give tips on finding & following blogs, and share ideas for how to get involved. Hope to see you there.

Nice Work If You Can Get It

Chris Edwards' blog post The $8m goodbye describes last-minute employment contract sweeteners given the departing Cadence executive team, including the CEO: totalling that lot up, it will cost Cadence in the region of $8m cash to say goodbye to the bulk of its former senior executive team.

Can you say Golden Parachute? I guess as long as any laid-off rank & file workers will be offered similar terms, this is fine. That'll be happening, right?

View the full CDNS chart at Wikinvest

Waiting for the Other Shoe to Drop

Cadence was supposed to announce quarterly financial results this afternoon, but they've found some "revenue recognition" questions resulting in a postponement: Cadence Announces Accounting Review and Postpones Release of Third Quarter 2008 Financial Results and Webcast

More ominously, there is wide speculation about job cuts coming to Cadence. Actually, the only "speculation" seems to be how bad it will be, whether 10-15% or as much as 25%. Scenarios are describe in Analysis: With Fister gone, Cadence layoffs may be next.

I don't know how the mood is outside of Silicon Valley or the US, but there's definitely a pallor over our industry and the economy in general. It seems like most all the EDA companies have had cuts or are planning them, and things aren't much better for their semiconductor-designing customers. At best, some companies are doing very selective hiring.

Good luck to all, and let's hope this rough spot doesn't become a quagmire.

No More Shoe Jokes for EDA

EDA pundits "won't have Mike Fister to kick around any more", as you can see by these changes afoot at Cadence.

AMD Announces Fabless Plan (finally!)

After months (years?) of speculation, AMD finally announced details of its plan to go fabless. Or is it Asset-Light? Or Asset-Smart? Let's just call it fabless, like everyone else in the industry. Read the details in A.M.D. to Split Into Two Operations - NYTimes.com. Amidst a battered overall market, AMD shares had a nice pop today:

View the full AMD chart at Wikinvest

So AMD is going to get a cash injection from a middle east "sovereign wealth" fund, plus a commitment to further invest in the fabs that they will jointly own. This is a good short-term financial shot in the arm.

We know that AMD can compete with Intel on design. The challenge has always been, how much of a disadvantage do they suffer by not having the most advanced fabs? This will be the long-term challenge, to see how well the JV will be able to compete with Intel's fab muscle as we go below 40nm and use exotic recipes such as "High-K Metal Gate". At least AMD will live to fight another day.

Update: For some skepticism on the added value and future prospects of the plan, see the story and comments under Who Benefits From A.M.D.’s Financial Engineering? - Bits Blog - NYTimes.com

Herb Reiter Tells the History of PrimeTime

In SKMurphy--Herb Reiter Interview on Fostering Static Timing Analysis Adoption, Herb Reiter talks about his career through the formative years of ASIC and EDA businesses. At Synopsys, he was instrumental in helping to define PrimeTime, and in particular in ensuring that PrimeTime was adopted and supported by the very influential ASIC vendors.

Looking back, times were simpler for EDA vendors when there were dominant ASIC vendors to define design methodology. Now, with the proliferation of fabless semiconductor design houses and the COT (customer owned tooling) hand-off model, it's harder to focus on a few key adopters, get their "sign-off certified" blessing, and reap the rewards as their customers flock to the anointed tools.

We know the result of the story--PrimeTime is the de facto standard static timing tool in the industry, and has been for over 10 years. Although in some respects PrimeTime is showing its age and could be vulnerable to competition, it is one of Synopsys' best-designed, most flexible, and robust tools.

On a personal note, I've known Herb Reiter since those MOTIVE and PrimeTime days, and he's a real professional and a gentleman. He really does seek to foster "win-win" relationships between his EDA clients and chip design companies. It's nice to see him getting publicity, and the opportunity to shed light on the development and roll-out of successful EDA products.

Top Semiconductor Infrastructure Stocks

Bullish on EDA? Check out Sramana Mitra's list of Top 9 Semiconductor Infrastructure Stocks.

I was surprised to see her put EDA companies at the top of her list, since she's described the EDA business model as "broken". It seems a combination of low share prices and the potential for industry shake-up through merger or LBO has attracted her to these companies.

HOT CHIPS Distinguished Panel Video

As an addendum to my report on the HOT CHIPS conference, I'm posting this link to the video highlights of the distinguished panel. [courtesy of IEEE Spectrum]

It was a thrill to see these giants of computer architecture talking informally and good-naturedly about the greatest hits and misses in microprocessor design. There were several references to the nearly perfect inverse relationship between architectural elegance and market success. That's right, they talked about the x86 architecture quite a bit.

Today in Semiconductor History

Chris Edwards' blog post the chip industry's quiet celebration salutes the innovations of our forebears and notes the "creative destruction" that's always been part of our industry.

Big Brother is Watching, and It's Fun

I'm at CDNLive (Cadence Users' Group), and consistent with Cadence adoption of new technology to support users, the conference features new intelligent name badges from nTAG Interactive.

"Name badge" is too mild a description for it. Each attendee gets a device the size of a large remote control with a lanyard. Besides having a traditional name tag sticker, the device functions like a dedicated PDA for the conference. It's chock full of features:

• Display of your personal conference itinerary. You know which session to go to at what time, and the paper abstract and speaker info is displayed on your nTAG screen.
• Updated conference schedule. Did presenters cancel or were new ones added? nTAG displays the current agenda.
• Social Networking! This is a fun feature. You hold up your device in front of another attendee's, and the screen displays something that you have in common (same business market, same hobbies or musical interests). And, at the push of a button, you can exchange business card information. After the conference, I'll be sent a report of all the people I met and a pointer to each session I attended.
• Online survey submission. After each session, we can rate it with a few clicks on the device. No paper required.
• A "points" system to encourage networking, filling out surveys, and attending the vendor expo. It's natural to see if you can earn more points. In this conference's case, earning enough points can get you a seat at tonight's poker tournament.

Overall, this gadget is pretty popular with attendees. We're all engineers, so we picked it up quickly and are happy to push all the buttons and explore the features.

What's sneaky is that I'm sure all this data is being transferred back to Cadence for some big-time data mining. They'll certainly track which sessions were attended and get the survey results. What else will they look at? Who networked with whom? I just hope they aren't tracking bathroom breaks. If my device lights up where I expect privacy, it's going down!

What's Hot at HOT CHIPS

I attended HOT CHIPS 20 on August 24-26 at Stanford University. HOT CHIPS' emphasis is more on computer server/system architecture than chip implementation. It's a nice small conference.

What follows are highlights of my conference notes. For more information, try to get a hold of the presentation copies, or attend next year's conference!

• x86 ISA is dominant for general purpose computing. (Interestingly, the x86 ISA was designed in a rush at Intel in a few weeks, to plug a product gap that they had. Not an elegant design intended to last for 30 years!)
• Multi-core is here today and used everywhere. (see Day of the Multicores) The jury is still out on how efficiently it can be used by software.
• Low Power design techniques are everywhere.
  • CPU architectures are changing for low power. Less speculative execution because abandoned computations waste power.
  • Clock gating is common at multiple levels
  • Dynamic Voltage and Frequency Scaling (DVFS) is used in many chips.

Press Coverage

• Ron Wilson of EDN's blog has several in-depth posts about topics from the conference
• EETimes.com articles on NVIDIA/Intel, China's Godson, and Photovoltaics.

Cadence Reaches Out

Much has been written in recent weeks about Cadence's surprise bid for Mentor Graphics and subsequent abandonment of the deal. It's not the proudest time in the EDA industry. Happening in the meantime, garnering less publicity, are two promising initiatives that Cadence is taking to reach out to customers.

• CDNLive! Silicon Valley 2008 is the Cadence Users' annual conference in San Jose, a la Synopsys SNUG. It's worth checking out if you're a Cadence user. I haven't gone regularly but plan to attend this year. I hope to see you there.
• Cadence Community is a newly designed web community with blogs, white papers, etc. It looks much better than their prior site, and I'm hopeful that it will attract a critical mass of knowledgable users. The previous site tended to have too many off-the-wall or newbie questions to have a useful signal/noise ratio.

Cadence withdraws proposal to buy Mentor Graphics

Breaking news: Cadence withdraws proposal to buy Mentor Graphics - San Jose Mercury News.

Is this related to Cadence could find it tough to raise debt for bid? (Thanks to Daniel Payne for sharing the link through Plaxo.)

An Investor's View of Top Semiconductor Stocks

Sramana has a concise summary of her take on big semi companies and their prospects at Top 10 Semiconductor Stocks - Sramana Mitra on Strategy.

Agree or not, she has a pretty good handle on technology and business and presents her case clearly. It's a good starting point to form your opinions.

Dilbert on Management

It's tempting to comment, but I'll let Dilbert speak for itself. I apologize if the formatting is messed up in the blog. Click on the strip to see it at Dilbert's site.

Merger Musings

"EDA Peggy" Aycinena has written a thought-provoking analysis & commentary (dare I say synopsis?) of Cadence's bid for Mentor Graphics in EDACafe Weekly : The Summer of Our Discontent: War Games in EDA.

She's rather cynical on the motivations of some corporate management. I think there's a good dose of truth here. How many mergers are done to appear to be "doing something", even though there's a good chance it won't ultimately create value.

But inquiring minds want to know, will some CEO be able to buy oodles of Ferragamos with the bonus from the merger?

Interview Do's and Dont's

So I'm recruiting for a design methodology engineer and have been screening resumes and doing interviews. This experience leads me to want to share some advice that not everyone seems to know.

Do

• Send your resume in PDF (Acrobat). I know that .doc (Word) is the de facto standard, but I've seen some really strangely rendered resumes coming across in Word. In PDF, it really is what you see is what you get.
• Check spelling and grammar carefully. I mean, duh! For a document this important, isn't it worth the extra effort? You should also have another person (preferably an English major :-) proofread it.
• Keep it concise. As you go describe long-ago experience, you don't need to detail everything you've done. The classic guidance is to fit your resume on one page. I know that's difficult, but once it gets to three pages or more, you're probably including too much.
• In an interview, pay attention to your "talk/listen ratio". I just made that term up. It's important to make sure you understand the question and get periodic feedback that you're on the right track before launching into a soliliquy about all that you know.

Don't

• Assume the (first) interview will be non-technical. Some companies interview easier than others. But for the case where you really get grilled, you better have done your homework. Better safe than sorry.
• List project specs or customer names (non-public information) on your resume. I'm pretty sure this is technically in violation of some employment agreement or NDA. I'm surprised at how specific some resumes are, listing the customer name, content and specs of chips they've worked on. You can "sanitize" this information and still convey the complexity of what you've done.
• Make incredible claims for your contributions. I understand that you want to put your best face forward, and maybe even puff up things a big. But when I read that you "architected, developed, and implemented" a major feature of a tool in eight months, ...

10 Great Tech Books

There's more to life than books, you know, but not much more.

Morrissey, The Smiths

I love books and "top 10" or "must read" lists, so IEEE Spectrum: 10 Great Tech Books is irresistable.

Which are your favorites?
Which ones were missed?

I've only read two of them: The Design of Everyday Things and The Soul Of A New Machine. The latter one in particular I found enthralling and ample motivation for my college computer architecture design project! Nowadays it must seem like a history book, since it concerns designing DEC-compatible minicomputers. But the thrill of design and hunting down and quashing elusive bugs is timeless.

Shine On You Crazy Designers

Denali is famous for throwing the best parties at DAC. I wish I had been there to see these performances. See more at YouTube - DenaliDacParty's Channel.

A Chip Carl Sagan Would Be Proud Of

Remember the great astronomer Carl Sagan? He had a famous catch phrase describing the enormity of the universe, talking about "billions and billions" of objects.

Well, the semiconductor world has our first giga-transitor chip as shown in AnandTech: NVIDIA's 1.4 Billion Transistor GPU: GT200 Arrives as the GeForce GTX 280 & 260. Check out the article's die shot, which compares the GT200 GPU next to an Intel Penryn CPU. What a tour de force! Imagine all the EDA tools that chip must have broken, leaving vendors quaking in their shoes. :-)

In reading up on Carl Sagan,

• I was reminded of the petty and very amusing feud between Sagan and Apple Computer.
• I learned that "the indefinite and fictitious number Sagan has arisen in popular culture to indicate a count greater than 4 billion." Thanks to Moore's Law, we'll see the first "Sagan-chip" before you know it.

Mendence, the Merger

We have to come up with a clever name for the combination of Cadence and Mentor. Chris Edwards coined* Cadentor, which is actually a pretty decent name. Going the other way, Mendence is too close to "menace" or "mendacity", so I suppose the PR types won't buy that. (When AMD bought ATI, the irreverent press dubbed it DAAMIT.)

Cadence's unfriendly bid to acquire Mentor Graphics is red meat for the EDA blogoshpere! (Be sure to click on that link. It's a fascinating one-page summary of dozens of EDA news & opinion sources.)

I've read many thoughtful commentaries on the possibility. Frankly, most of them are unfavorable on the deal. Some of the substantial analyses:

• Can you guess Gabe's take on Cadence's arrogance?
• Chris Edwards initial take.
• Later, Chris has a very pretty picture of how the companies' main products line up at Overlaps 'r' us.
• Ron Wilson has a possible explanation (conspiracy theory?) for Cadence's motivations.

Two of the more curious quips I read:

• Customers don't want the EDA vendor to provide a complete front to back flow. They want best of breed tools, and for third party companies to link them together. I agree that we need best of breed tools, but not that we need third party companies to hook them together. Are there examples of companies that make a good business of that? That sounds like an ASIC company, and they aren't exactly thriving. There also used to be a company called Reshape that had their own physical design flow on top of commercial tools. But they ended up going out of business.
• Cadence acquiring Mentor could present a big challenge to Synopsys. Well, I don't know. When two established giants come together, what technological advance does that enable? Not much that I can see. A bigger challenge is when a giant acquires a startup with hot new technology: think Cadence with Get2Chip, or potentially Mentor with Sierra Design Automation. One successful big acquisition was Synopsys acquiring Avant! -- I don't know what went on under the covers, but the products were complementary and continued to be successful after the deal was done.

  Of course, there may be "business synergies" -- cutting common administrative and infrastructure costs, and having a bigger menu for "all you can eat" deals. But it's kind of sad if one of the biggest business events in EDA just comes down to that.

*Update: Gabe Moretti lays claim to coining "Cadentor". I'll let Chris and Gabe hash it out.

NEWS FLASH: Cadence Proposes to Acquire Mentor Graphics

And then there were three? This just in: Cadence Proposes to Acquire Mentor Graphics for $16.00 per Share in Cash.

What is Mentor good at? I haven't used their tools recently, but by reputation I think they're strong at

• DFT (FastScan)
• LVS/DRC (Calibre)
• Simulation (former ModelSim)
• Certain pieces of Place & Route (Sierra)

So, does Cadence need some or all of these pieces because they're not strong? That's certainly the case for DFT: Mentor is a leader and Cadence is an also-ran. Or are they just "buying" Mentor's customer base?

UPDATE: Other blog reactions:

• Cool Verification. A verification tools perspective.
• EDA Thoughts. No, honestly -- tell us what you really think of the merger!
• EDA Cafe. Several news releases, including Cadence's own presentation on the deal.
• Sramana Mitra on Strategy. She's been calling for a consolidation in EDA, or some kind of shakeup in the business model. Her post has a good selection of links to her previous writings on the EDA business. This post also has the best comments thread on the topic.

One More Thing: Apple to Tackle Parallel Computing

Apple in Parallel: Turning the PC World Upside Down? - Technology - New York Times Blog quotes Steve Jobs in a discussion of harnessing multi-core computing:

Apple, he asserted, has made a parallel-programming breakthrough.

It is all about the software, he said. Apple purchased a chip company, PA Semi, in April, but the heart of Snow Leopard will be about a parallel-programming technology that the company has code-named Grand Central.

“PA Semi is going to do system-on-chips for iPhones and iPods,” he said.

Grand Central will be at the heart of Snow Leopard, he said, and the shift in technology direction raises lots of fascinating questions, including what will happen to Apple’s partnership with Intel.

Snow Leopard will also tap the computing power inherent in the graphics processors that are now used in tandem with microprocessors in almost all personal and mobile computers. Mr. Jobs described a new processing standard that Apple is proposing called OpenCL (Open Compute LibraryComputing Language) which is intended to refocus graphics processors on standard computing functions.

“Basically it lets you use graphics processors to do computation,” he said. “It’s way beyond what Nvidia or anyone else has, and it’s really simple.”

Since Intel trails both Nvidia and A.M.D.’s ATI graphics processor division, it may mean that future Apple computers will look very different in terms of hardware.

Will OpenCL be an alternative to NVIDIA's Cuda software interface? Read the comments in the NY Times blog for some good technical analysis and the usual passion that surrounds any Apple pronouncement.

Update: see a thoughtful perspective in Chris Edward's blog.

Tantalizing But Flawed

I would love to know the real scoop on the semiconductor challenges and drama involved in developing a high-end gaming console like Microsoft's Xbox 360. A surprising story originating at DAC, EETimes.com - The truth about last year's Xbox 360 recall dangles some tantalizing clues.

I find the story frustrating and a bit flawed in helping to get to the truth of the matter. The article blames Microsoft's troubles on "bypassing an ASIC vendor to go directly to TSMC". But then it mentions ATI Technologies as a likely ASIC vendor. Huh? ATI, an ASIC vendor?

I would call ATI more of a "contract design house" in this deal. They have considerable graphics IP, and designed the GPU for the Xbox 360. (NVIDIA designed the GPU for the original Xbox.) Perhaps Microsoft decided to take only the design (netlist or GDS2) from ATI, and manage the silicon operations and production ramp themselves. That could be where they went astray. By not contracting with an experienced semiconductor company (like ATI or NVIDIA) to manage all the silicon issues, they exposed themselves to more risk. And maybe that came back to bite them in the form of the product defects exemplified by the "red ring of death" and led to product recalls.

Penny wise and pound foolish, Microsoft?

DAC 2008 Meta-Must-See List

That's right, readers. This is a list about lists!

I search the internet, so you don't have to.
-- From "your friend in the EDA Blogging business". (apologies to Tom Shane)

• Cheesy John Cooley's Must See List for DAC
• Ten top technology developments to see at DAC, SCDsource (Richard Goering)
• Gabe's teaser of Gary Smith's list. Looks like you have to visit them at DAC to get the real list. Gary has enough clout that companies issue press releases when they make his list!
• Gary Smith interviewed on YouTube. He names some significant trends in EDA this year, including Analog and Low Power design. The "Software" trend is a little harder to see; I know Gary has been calling for ESL to take off for a few years now.

What "EDA Blogger Birds" Could Squawk About

Next week at the Design Automation Conference, a few leading EDA bloggers are arranging an impromptu "Birds of a Feather" session at DAC. There have been several posts discussing the event. Informal Blogging Event at DAC Gains Interest has a good summary.

Although I'm not sure I'll be going down to Anaheim, I'm very intrigued by the event and would like to attend. What topics would EDA bloggers talk about? Here are some that I would like to discuss with my brethren:

• Online magazines, vendor communities, "DeepChip", and blogs: what each is good for.
• What to write about. What not to write about. What I really want to write about, but am afraid to.
• Frequency and regularity of posting.
• How to build audience. How to track audience. Support each other through linking and commenting. Use pictures? Polls?
• How to foster discussions. Pros and cons of comments. Need for an all-EDA bulletin board.
• Team blogging. (multiple authors contributing to one blog)
• Beyond blogging: social networks (LinkedIn, Plaxo). The Twitter phenomenon.
• Can you make any money? Ads: google or sponsored.
• For readers: how to find and follow blogs.

Incidentally, I've been blogging about EDA and Semiconductors for three years! My first post was about TSMC and low-power design; topics that are if anything, more relevant today.

EDA Earnings Recap

Quarterly financial results are in for the major EDA vendors. This was Magma's turn to disappoint, causing the share price to drop almost 30%. Mentor Graphics stock has performed the best, closely followed by Synopsys. Links to results are below.

• Cadence Languishes On - Sramana Mitra on Strategy
• Magma Design fiscal 1st-qtr outlook disappoints investors.
• Synopsys Posts Financial Results for Second Quarter Fiscal Year 2008. Higher (non-GAAP) earnings.
• Mentor Graphics Reports Fiscal First Quarter Results. Quarterly loss. "Difficult environment". Cost/headcount controls. More importantly, projecting "a strong second half".

Conformal ECO Designer: Successor to ECO Compiler?

Without too much fanfare, Cadence has introduced a tool to help automate ECO creation: Cadence Encounter Conformal ECO Designer Improves Logic Designers' Productivity. At least I didn't see too much fanfare in the engineering press. However, it was mentioned in Cadence's recent earnings conference call:

... Cadence’s Encounter Conformal ECO Designer, a unique and automated capability to address the extreme pressure customers face to deliver on schedule while still achieving targets for product cost and quality. ECO stands for Engineering Change Order and unfortunately for designers these are all too common.

If you've been in the industry a few years, you'll recall that Synopsys had introduced a tool, ECO Compiler, for the same purpose. It never seemed to gain much traction, and Synopsys eventually abandoned it. I never had the chance to use ECO Compiler and I don't know why it didn't succeed. I heard some mention that it's a hard problem to solve, and that the market may have been limited. It's the type of tool that when you need it, you really need it. But you don't need to buy dozens of licenses.

It will be interesting to see how Conformal ECO Designer does -- whether it's better technology, and whether Cadence is able to make the business equation work.

From the Department of Redundancy Department

Dobbs Code Talk - Redundancy in Programming Languages discusses why sometimes redundancy is a good thing. Like in accounting, or computer programming. (Or HDL programming.)

Key conclusion:

Many programming language designers mistakenly assume that removing redundancy makes programmers more productive. ...

Well-designed redundancy can, however, dramatically improve productivity with its ability to uncover errors early in the development process. ...

The trick, of course, is figuring out which redundancies are good, and which aren't.

Countdown to DAC: Design Automation Conference

If you're involved in the EDA or ASIC industries, you should consider going to 45th DAC Home: Design Automation Conference.

There are early registration discounts available for signing up before May 19, so get moving!

I mostly like DAC for the exhibits and the panels. A lot of the papers go over my head -- often PhDs presenting their thesis research on "new routing algorithms that did x% better on university benchmarks."

Profile-Guided Optimizations for Software Development

Not being a commercial software developer, I hadn't heard of Profile-Guided Optimizations (from the blog of the Opera Browser Desktop Team), but it sounds clever: run some "real-world benchmarks" through your application, and then recompile the application to optimize for the code path followed most often.

Is this common in software engineering? Do EDA tools do tricks like this for best performance? Let's hope so.

Weirdest EDA Acquisition Ever?

Just read about Synopsys Invests In Prover Technology and I decided to post it without further research, just to react to the article.

From reading the press release, I'm really left scratching my head. Is this for real? It's not April 1, right? I am very curious to see how much synergy exists between "railway signal design automation" and EDA!

A missing link in tech history

For those interested in the history of our industry -- and who of us shouldn't be? -- here's a news item of the pre-electronic (even pre-electrical) origins of computing:

A missing link in tech history - San Jose Mercury News tells the story of the construction of the "Babbage Difference Engine", which was designed but never built by 19th century inventor Charles Babbage. This is truly an engineering marvel. Frankly, I'm amazed that it works! Here's a video showing some details of this mechanical masterpiece in operation. I certainly want to head over to Computer History Museum in Mountain View to check it out.

While we're on the subject of history, here are other good resources to check out:

• Intel Museum (online and in Santa Clara)
• The Chip History Center (online)
• IEEE Virtual Museum (online)

Blessed Perl

I just spent three days in great Advanced Perl Programming class taught by the Anderson Software Group. This was the best class I've taken in a long time. One of the most satisfying things to do at work is to develop a well-crafted program (usually in Perl) and see it working smoothly to automate my own or someone else's work. The class exposed me to things I'd always wanted to know about Perl, including Object-Oriented Perl, GUI building, and interfacing to databases, networks and C programs. Great stuff!

We worked from Anderson's class notes, but the reference text for the course is Advanced Perl Programming from O'Reilly. See my other favorite programming books on the CAD Engineer's Bookshelf.

I'm hearing rumblings that Python is a "better Perl", designed from scratch for object-oriented programming. I guess it lacks that Perl syntax that can make a program look like hieroglyphics? This sounds like the next language to learn.

Apple buys a CPU company

Wow, I didn't see this coming: Apple disses Intel's Atom, buys PowerPC designer P.A. Semi. Very interesting. I had been vaguely aware of P.A. Semi, but didn't know where they'd find big demand for their advanced PowerPC CPU. And Apple has become more of a system designer than a chip designer. So I wouldn't have guessed that they'd buy a Semiconductor IP company. Some have twittered, "why not AMD?" For that matter, why not Transmeta, if they're looking for a very low power mobile CPU?

Congratulations, P.A. Semi! It will be fun to see how this plays out.

Forbes article

Update: color analysis from Chris Edwards.

Stop Me Before I Schwag Again

Just got back from the TSMC Technology Symposium. I'll think about what I can share from that always-valuable event. But what I have on my mind, in the wake of Earth Day, is the schwag that us engineers accumulate, and how we just can't stop it!

• Another conference, another tote bag. My closet is overflowing! And, another non-recyclable badge lanyard that will have to be thrown out. I wish that conference organizers would "think green" and give out less "junk", and distribute reusable or recyclable merchandise. Of course, I need to look in the mirror as well. Why can't I say "No" to this stuff? I'm making some progress in turning down trinkets, but it requires eternal vigilance.
• Will engineers do anything for a T-shirt? Although I love them, my home is overflowing with shirts from vendors and from runs and rides that I go on. I've become more discriminating: a vendor's white t-shirt won't make the grade, nor will colored ones with a non-clever design. What I am amazed by is how easily I can give these shirts away to other engineers. I put a vendor's black t-shirt out in the break room with a "Free Shirt!" Post-It note. Within five minutes, it disappeared! I have successfully followed the mantra Reduce, Reuse, Recycle. In the words of Fake Steve Jobs, namaste.

DFM heads into the foundry

And we're back to the "Hacking Cough" blog for this analysis of DFM heads into the foundry. The post explains an innovative announcement from TSMC whereby they will offer as a service Blaze DFM's power & variation optimization capability. The innovative part is that instead of a chip design company buying the EDA tool, you pay for it as a service from your foundry (exclusively TSMC at this time).

One thing I'd wonder about is how design teams can accurately convey their timing environment to TSMC (across all modes and corners) such that these optimizations don't break timing. Running sign-off STA is not quite as simple as "just send an SDC file over". :-)

Good Blog, Odd Name: Hacking Cough

I've found a semiconductor blog to recommend, with the curious name of Hacking Cough. It's better than the name implies! One more salvo in the 32nm war is a nice overview of where IBM, Intel, TSMC, and others are headed with their 32nm process technology recipes, and their different approaches to solving scaling and power consumption problems.

NVIDIA Powers Hardware-Accelerated SPICE Simulator

The multi-core future of EDA is just starting to appear. NVIDIA Powers Hardware-Accelerated SPICE Simulator is an exciting announcement of a real EDA application (Fast SPICE) running on massively parallel GPU hardware. Will general purpose GPU (GPGPU) computing become the acceleration platform for EDA?

SNUG SJ 2008 Report

For my report on this year's SNUG San Jose conference, I'll point out the major themes that cropped up across multiple sessions. If you're a Synopsys customer, you can see all the papers and presentations at the SNUG web site.

Low Power Everywhere

Low Power support is becoming pervasive in design flows. Both in design and verification, tools are supporting techniques such as Clock Gating, Multi-Vt, Power Gating, State Retention, Multi-Voltage, and Dynamic Frequency and Voltage Scaling.

Of course, for an EDA company, this requires a new name to designate these new features. So, Synopsys is calling it their "Eclypse" flow. (Note the funky spelling to give fits to spell checkers everywhere.) I don't think this name matters much to ASIC engineers -- do you care what the "Galaxy" or "Discovery" platforms consist of?

DC Topographical Uber Alles

DC Topographical, which is Design Compiler's inclusion of "virtual layout" during synthesis, is becoming mainstream. The newest edition is DC-Graphical. It adds congestion reporting and optimization, and a GUI to help visualize and debug virtual layout-related issues. It certainly makes more sense than using traditional wireload models, though you could run into correlation issues if the virtual layout floorplan is very different from actual.

Blues Compiler Rocks

The biggest treat of SNUG was the first public west coast performance of Blues Compiler, Synopsys' house band. To be honest, I hung around to hear them play out of curiosity. I figured it would be a bunch of guys who used to play in college and still liked to goof around with their instruments. Boy, was I in for a pleasant surprise! Featuring CEO Aart on electric guitar, and "Diva" Joanne W on vocals, this band absolutely rocked! They sounded very professional and played a number of sweet electric blues/rock songs. I'd compare their sound to Janis Joplin's, who I am a big fan of. Absolutely recommended to check out if you get a chance. They usually play at Boston SNUG, and I hope they'll be back in San Jose in the future.

A review of the performance would not be complete without a nod to the "Solid Gold" Marcom Dancers, who succeeded in getting a bunch of engineers in a banquet room dancing to the tunes. Quite an accomplishment. I was impressed and hope to get dancing lessons from "Crazy Legs" Shankar H in the future.