Saturday, April 30, 2005
I Googled around and this is one of the authoritative descriptions of strained silicon: IBM's Strained Silicon Page. I'd like to find more info on how new processes such as this and silicon-on-insulator (SOI) affect the requirements for EDA tools and flows.
Thursday, April 28, 2005
EETimes.com - TSMC sees low-power process as new technology driver is a nice summary of this week's TSMC Technology Symposium, which I attended for the first time. The symposium and exhibitors were very informative. Need to read up on strained silicon!