Synopsys F3Q2010 Earnings & Focus

I don't read all the EDA companies' investor reports and analysis, but the transcript of Synopsys CEO Discusses F3Q2010 Results - Earnings Call gives you a concise view of Synopsys' recent successes and future emphases.

Top themes:

• IP. The DesignWare team is chugging along with significant and growing business, augmented by the Virage Logic acquisition.
• Systems
• FPGA Prototyping

Product-wise, Aart emphasized their custom design competitor to Virtuoso, which I don't find super exciting. It's always nice to have a more modern implementation of a workhorse tool, but not earth shattering. Synopsys bread and butter tools, which pay the paychecks, didn't get much air time.

I think some of the market share claims could be misinterpreted (90% of 32 nanometer chips), but that's standard fare for the ways vendors advertise this.

Rethinking Digital Design

Famed Stanford professor Mark Horowitz is giving talks on Why Design Must Change: Rethinking Digital Design. The questions raise provide refreshing distraction from the day-to-day concerns about the economy, lack of growth in EDA, and creative destruction in the semiconductor industry.

Prof. Horowitz's solution is provocative and plausible, though not a "slam dunk". I'd like him to quantify how much his approach would reduce the total cost of nanometer semiconductor design. Also, how applicable is it to domains beyond processors? Isn't it very difficult to create an "architecture generator" for each domain? For another perspective, here's a blog post reviewing the talk.

Best Companies To Work For

The 25 Best Tech Companies To Work For uses data from Glassdoor.com to aggregate the anonymous, inside scoop on what's good and what's not at employers.

Companies on the list relevant to EDA/ASIC engineers:

• #1 Google
• #4 Apple
• #7 Qualcomm
• #12 Juniper
• #14 MathWorks
• #15 Analog Devices
• #17 Intel
• #22 Synopsys "employees love their CEO"
• #24 Cisco Systems
• #25 Texas Instruments

Moore's Law for EDA?

Thank you, EDA vendors! From Semiconductor input costs vs output prices -- managing the squeeze:

SURPRISE: EDA cost per transistor is coming down the same learning curve as all the other input costs like materials, chemicals, labor, etc. (above) and it has been doing so throughout semiconductor history.

What is Wally Rhines' prescription for increased EDA value-add (and profits)? EDA vendors

... must incorporate the embedded software development and system analysis costs into their design tools and flows. To the extent this is accomplished, there isn’t a cost problem and the 30%+ per year per transistor cost reduction can be achieved. That’s why EDA companies first became involved in embedded software in the mid 1990’s. That involvement will grow as EDA companies take on more responsibility for the total design challenge and its costs. It’s just part of the evolution of roles in the semiconductor industry. (Walden C. Rhines is chairman & CEO, Mentor Graphics Corporation.)

Although in the short term there are still plenty of us fighting it out for nanometer-scale timing (and now power) closure, the focus on software and systems is plausible for the long term. We must find quantum leaps in productivity to take advantage of Moore's law in semiconductors.

SKMurphy's DAC 2010 Meta-Post

Sean Murphy has done a great service in compiling much of the Design Automation Conference coverage in his DAC 2010 Blog Coverage Roundup. It merits close review, and is an especially welcome resource for people like me who weren't able to attend the show.

You can see other trip reports and interesting links in the delicious.com sidebar of my blog, where I post EDA and Semiconductor links.

Spying DAC from Afar

Vendors to See, Vendors to Overlook?

I don't mean to become a "riff on John Cooley" blog, but it turns out he's pumped out some provocative missives leading up to next week's Design Automation Conference (DAC). I was about to write a post on "what I'd see at DAC", when along came Cooley's Cheesy Must See List for DAC 2010. Before we review his list, let me offer my own list of interesting products and technologies. This won't be as expansive as John's list, since I spend most of my time using or considering implementation tools.

Intriguing Products

• Magma Tekton. The tool is targeted to be a better, more modern PrimeTime. Usable as a drop-in replacement, with claimed significant speed and capacity advantages, and attractive added features like SPICE integration and MCMM analysis.
• Oasys RealTime Designer. I wrote about Oasys last year, when they came out of stealth mode. Now, they're rolling out customer testimonials from Xilinx and Juniper Networks. Harry the ASIC Guy, who's been around the EDA industry, has some interesting theories about where Oasys may find business.

Interesting Technologies

• Silicon IP. This is the most sure-fire way to develop 45nm and 28nm chips in an economical way. But do you want to become the general contractor for a dozen IP vendors? You may not have to, with consolidation such as Cadence acquiring Denali and Synopsys acquiring Virage Logic.
• ESL. It's always seemed like a logical step up the abstraction ladder to rise above RTL. There's lots of M&A activity here, with Synopsys and others gobbling up ESL synthesis companies.
• Variation-Aware Analysis. Will SSTA ever be ready for prime time? It's been the Next Big Thing in EDA for a few years, but there is little PT-VX talk at SNUG, and most of the STA startups are focusing on beating PrimeTime at traditional corner analysis rather than SSTA.
• Asynchronous Design. I'm intrigued by not having to synchronize a clock across a chip, and hardening cross-chip interfaces to variation. But I've seen little in the way of IP or automation to realize such unconventional design techniques. Are there any vendors out there? Who are the academic research leaders?

The Cheesy List

I do admire John Cooley's list for its breadth. For the most part, I think he hits the major players in each area and captures the talking points that they're featuring for this DAC.

With one notable exception. Did you notice that his list doesn't feature a certain EDA company that's hard to overlook? That's right, Synopsys. He doesn't feature one Synopsys product in his list! That's a curious oversight to me. While I do think that much of EDA innovation comes from smaller companies, Synopsys does hold its own in innovation compared to Cadence or Mentor, but those companies did have featured products in John's list. Are John and Synopsys having a spat, or is he getting ready to roll out his exclusive must-see Synopsys list?