Big Changes at EE Times, Cadence Gets More Social

I'm sorry to see EE Times and its sister publications ending their print runs after many years. In my career, it was the original and most highly valued industry news source. It was a thrill to "qualify" for a subscription and receive the first issue addressed to me in my first job.

Several top media types have now landed at Cadence as they beef up their social media presence. The latest is former EE Times editor Brian Fuller, as announced in Right Turn on Seely Avenue -- A New Blog from Brian Fuller.

Both Synopsys and Cadence are making significant efforts in reaching social media, and it's interesting to see the different approaches. Synopsys has long been cultivating in-house talent and has first-mover advantage. Cadence has taken a shortcut by hiring top-notch journalists.

We can enjoy both perspectives, but certainly miss the more objective reporting formerly provided by third-party media.

Qualcomm Co-Founder on Life & Keys to Success

Nice profile of one of Qualcomm's founders. It's remarkable what humble aspirations the company started with, and where they are today. I believe their first major success was a radio network for trucking fleets!

The Engadget Interview: ARM co-founder John Biggs

Happy New Year and welcome to 2012! The Engadget Interview: ARM co-founder John Biggs -- Engadget covers the interesting history, philosophy, and future of ARM Holdings. As you will learn from the article, it's a company that might never have been started were it not for Intel.

Unix's Long Strange Trip

If you love computers and history as much as I do, you'll enjoy The Strange Birth and Long Life of Unix - IEEE Spectrum.

Such a wisely designed system to be pervasive after 40 years!

Steve Jobs' Partner in Design

Tech news has had a plethora of stories about Steve Jobs and Apple since Dear Leader announced he was stepping down as CEO.

The SF Chronicle has a nice profile of one of the less publicized but vitally important talents at Apple, the head of product design: Apple's product vision falls to Jonathan Ive.

Update: Perhaps the San Jose Mercury News follows my blog, because shortly after this post, the newspaper of Silicon Valley came out with their own profile of Mr. Ive, Apple's design wizard has not left the building - San Jose Mercury News.

Steve Jobs’s Best Quotes

In honor of Steve Jobs on the day of his resignation as Apple CEO: Steve Jobs’s Best Quotes - Digits - WSJ. I'm most inspired by the things he has to say about design, and life. And most amused by what he says about Microsoft.

Saluting the Father of our Foundry

A well-deserved congratulations to Dr. Morris Chang, recipient of the 2011 IEEE Medal of Honor. IEEE Spectrum magazine has published a fascinating profile of his professional life in Morris Chang: Foundry Father - IEEE Spectrum.

The article quotes numerous industry luminaries to frame his impact. It's hard to overstate what Dr. Chang's accomplishments have done for so many of the industries that we work in: fabless semiconductor, EDA, ASIC, ... I found the article to be full of fascinating tidbits, such as

• His first job paid $480 per month.
• At the beginning, he was a self-taught semiconductor engineer. He spent countless hours after work to learn about new fields.
• He was a highly successful TI executive before "starting over" to create a new industry from scratch in Taiwan.
• On several occasions, he left good companies when things weren't working out, with no immediate job prospects. He had the confidence that he'd find a good opportunity.
• Dr. Chang didn't become fabulously wealthy from founding TSMC! He's well-off, for sure, but a US executive would have made sure to ensure his success first.

Insanely Great or Just Insane?

A fascinating inside look at Apple and Steve Jobs' management style, excerpted on wired.com. The full article is available for purchase and download at Amazon.

I'm happy to be an Apple customer instead of reporting to Steve!

Jean Jennings Bartik, a Computer Pioneer

Some pretty cool very early computer history from this obituary: Jean Jennings Bartik, a Computer Pioneer, Dies at 86 - NYTimes.com. Also, Jean Bartik on Wikipedia. Greatest Generation Pioneers, thank you for your contribution to the United States and the Computing profession.

RISC versus CISC, Who is #Winning?

As you may know, I have a soft spot for technology history. I loved going to HotChips and hearing all the old bearded geeks debate CPU architectures, and why x86 often wins despite its warts.

I was delighted to find this couple of blog posts by UC Berkeley Computer Science professor David Patterson, one of the giants of computer architecture (and founding member of the RISC Fan Club):

1. RISC versus CISC Wars in the PrePC and PC Eras - Part 1
2. RISC versus CISC Wars in the PostPC Eras - Part 2 - ARM Community

If RISC and CISC start to look more like one another as they steal good ideas from each other, the architecture won't determine the "winner". Rather, it will hinge on other vital issues such as process technology (Intel wins) and openness (ARM, MIPS lead here).

Finally, if I may add a sophomoric comment, doesn't Prof. Patterson's mug shot remind you of Patrick Stewart (Captain Picard)?

LSI Logic's 30th reunion!

Who's who at LSI Logic's 30th reunion gives a great synopsis of the pioneering company in the ASIC/EDA industry. To read the whole story, track down a copy of Silicon Destiny: The Story of Application Specific Integrated Circuits and Lsi Logic Corporation, by Rob Walker, one of the founders of LSI Logic. (I have an autographed edition!)

Insanely Great Principles

With Apple firing on all cylinders: taking over the mobile electronics market, increasing computer share, and, by the way, attaining the second largest market capitalization in the world, it's instructive to reflect on characteristics that make Steve Jobs such an effective CEO, as described in John Sculley: The Secrets of Steve Jobs’ Success [Exclusive Interview] | Cult of Mac.

Though I'm not sure I'd always like to be his employee, it is pleasing to be his customer. Customers willing to pay a stiff premium are the sincerest form of flattery.

Rethinking Digital Design

Famed Stanford professor Mark Horowitz is giving talks on Why Design Must Change: Rethinking Digital Design. The questions raise provide refreshing distraction from the day-to-day concerns about the economy, lack of growth in EDA, and creative destruction in the semiconductor industry.

Prof. Horowitz's solution is provocative and plausible, though not a "slam dunk". I'd like him to quantify how much his approach would reduce the total cost of nanometer semiconductor design. Also, how applicable is it to domains beyond processors? Isn't it very difficult to create an "architecture generator" for each domain? For another perspective, here's a blog post reviewing the talk.

Vendors to See, Vendors to Overlook?

I don't mean to become a "riff on John Cooley" blog, but it turns out he's pumped out some provocative missives leading up to next week's Design Automation Conference (DAC). I was about to write a post on "what I'd see at DAC", when along came Cooley's Cheesy Must See List for DAC 2010. Before we review his list, let me offer my own list of interesting products and technologies. This won't be as expansive as John's list, since I spend most of my time using or considering implementation tools.

Intriguing Products

• Magma Tekton. The tool is targeted to be a better, more modern PrimeTime. Usable as a drop-in replacement, with claimed significant speed and capacity advantages, and attractive added features like SPICE integration and MCMM analysis.
• Oasys RealTime Designer. I wrote about Oasys last year, when they came out of stealth mode. Now, they're rolling out customer testimonials from Xilinx and Juniper Networks. Harry the ASIC Guy, who's been around the EDA industry, has some interesting theories about where Oasys may find business.

Interesting Technologies

• Silicon IP. This is the most sure-fire way to develop 45nm and 28nm chips in an economical way. But do you want to become the general contractor for a dozen IP vendors? You may not have to, with consolidation such as Cadence acquiring Denali and Synopsys acquiring Virage Logic.
• ESL. It's always seemed like a logical step up the abstraction ladder to rise above RTL. There's lots of M&A activity here, with Synopsys and others gobbling up ESL synthesis companies.
• Variation-Aware Analysis. Will SSTA ever be ready for prime time? It's been the Next Big Thing in EDA for a few years, but there is little PT-VX talk at SNUG, and most of the STA startups are focusing on beating PrimeTime at traditional corner analysis rather than SSTA.
• Asynchronous Design. I'm intrigued by not having to synchronize a clock across a chip, and hardening cross-chip interfaces to variation. But I've seen little in the way of IP or automation to realize such unconventional design techniques. Are there any vendors out there? Who are the academic research leaders?

The Cheesy List

I do admire John Cooley's list for its breadth. For the most part, I think he hits the major players in each area and captures the talking points that they're featuring for this DAC.

With one notable exception. Did you notice that his list doesn't feature a certain EDA company that's hard to overlook? That's right, Synopsys. He doesn't feature one Synopsys product in his list! That's a curious oversight to me. While I do think that much of EDA innovation comes from smaller companies, Synopsys does hold its own in innovation compared to Cadence or Mentor, but those companies did have featured products in John's list. Are John and Synopsys having a spat, or is he getting ready to roll out his exclusive must-see Synopsys list?

Pre-DAC EDA Gossip and "User Evaluations"

John Cooley is the original user's voice in EDA, and his DeepChip web site and mailing list continue to have the biggest following. I used to think of John as "the Michael Moore of EDA" -- a rabble-rouser, confronting the dominant companies and their executives, and sticking up for the little guy.

He still has that image, but I've come to realize that the in-depth tool evaluations that he posts aren't always the innocent sharings of chip engineers that they appear to be. There's definitely an element of the EDA vendors' PR machines in some write-ups. That's OK, as long as you take them as such. If these articles are really EDA vendor white papers or press releases, at least they're written in a language that speaks directly to the challenges we face in chip design. With that caveat, here's a list of his latest nuggets:

• Rumors on Synfora, Forte, CatapultC, AutoESL, CoWare, Calypto, EVE. This doesn't read like EDA vendor spin, but rather some provocative EDA-insider scoop on M&A in the ESL space.
• A follow up first evaluation of Atoptech's new Apogee floorplanner
• Another production user on NextOp's BugScope assertion synthesis
• Some hands-on user experiences with HLS and AutoESL's AutoPilot
• Getting 100X scan compression with Talus Design and Mentor Tessent
• Cadence Virtuoso and Solido for variation-aware custom design. (clearly labeled as a white paper)
• Whitepaper on IC Manage unifying bug tracking & design management. (clearly labeled as a white paper)

2010 IEEE Medal of Honor Winner: Andrew J. Viterbi

Interesting profile of one of the giants of modern day technology, who's contributions we use and design with every day: IEEE Spectrum: 2010 Medal of Honor Winner: Andrew J. Viterbi.

CS Gravitas

It's hard to imagine greater evidence of a tremendous impact on computer science than authoring the most cited paper in all of computer science as well as in EDA. Remarkable! Before you follow the links, can you guess the subject of the paper?

Find the answer in Gabe Moretti's Kaufman Award Dinner Notes. Good links and amusing pictures are in the coverage at SCD Source. And to delve deeper into the subject, see the Wikipedia article.

DAC Meta-Blogging

If you're at DAC and haven't yet overdosed on "Social Media", please stop by Tweet, Blog or News: How Do I Stay Current? this afternoon. I'll be on the panel, sharing ideas for how to wade into this trend in the most efficient way. Listen, ask questions, and say Hi.

Denali Software is a great supporter of DAC. They teamed up with Atrenta and Springsoft to start the I Love DAC program and provide dozens of complimentary Exhibits passes for the conference. They also ran good-natured competitions for EDA's Next Top Blogger and EDA's Community Superheroes. Congratulations to Karen Bartleson of Synopsys for winning the Top Blogger distinction, and Joy Matsumoto from Cadence for her great efforts to support charitable causes.

Synthesis Gets Interesting

As a pleasant surprise, there's quite a bit of activity and emerging excitement in the area of synthesis, just in time for this year's DAC.

Physical Synthesis

Oasys Design Systems has come out of stealth mode with rather incredible performance claims.

It's exciting to hope for a revolution in synthesis. Put me in the "show-me" camp. It's (relatively) easy to meet 80% of what Design Compiler can do, but there are many features and tricks developed by DC over the years, making it a hard tool to displace. Synopsys has certainly seen strong competition, including from Ambit BuildGates (acquired by Cadence) and most recently by Get2Chip (now Cadence RTL Compiler). What often happens is not that king DC is overthrown, but that the competition lights a fire under Synopsys and their tools will improve at a much faster pace than market dominance would dictate.

What's interesting about Oasys are the tremendous claims about capacity and run time, and the emphasis on physical synthesis, combining logic synthesis with placement and optimization. The company also has impressive board members, including Sanjiv Kaul (former implementation GM at Synopsys) and, re-appearing to EDA after a long hiatus, Joe Costello (charismatic and successful former Cadence CEO).

ESL Synthesis

For several years, EDA industry analyst Gary Smith has been calling for the ascent of ESL (Electronic System Level) design. He was already called an ESL evangelist back in 2006! It's been the next big thing for a while now. It seems to follow the industry's progression from transistors to gates to RTL, but RTL remains the mainstream design method.

In the context of design implementation, ESL implies synthesis at a more abstract level than RTL. This year, there appears to be considerably more buzz, and not just from Gary. See, for example, recent posts by John Cooley and Richard Goering.

Key players include

• Forte Cynthesizer
• Mentor/synthesis CatapultC
• Cadence C-to-Silicon
• Bluespec
• Synfora Pico Extreme

My apologies for any I've overlooked--I'm learning about this field. One point of concern is that there isn't a consensus on design language/dialect, which varies by vendor over C, C++, SystemC, and proprietary languages/extensions. That can impede adoption. It was Design Compiler that established the de facto standard for Verilog RTL synthesis subset, and this provided a common point for customers (and competitors) to converge on.

It's nice to see continued innovation in this critical area of IC design, and merits further investigation.

Denali DAC Festivities

The EDA company Denali is famous for their DAC parties. They are also running fun contests where the public can vote for the top EDA blogger or community superhero. See some new faces and vote for your favorites at

• EDA’s Next Top Blogger
• Community Superhero

And, at the party itself, watch the show and vote for EDA Idols!