Wednesday, April 23, 2008

Apple buys a CPU company

Wow, I didn't see this coming: Apple disses Intel's Atom, buys PowerPC designer P.A. Semi. Very interesting. I had been vaguely aware of P.A. Semi, but didn't know where they'd find big demand for their advanced PowerPC CPU. And Apple has become more of a system designer than a chip designer. So I wouldn't have guessed that they'd buy a Semiconductor IP company. Some have twittered, "why not AMD?" For that matter, why not Transmeta, if they're looking for a very low power mobile CPU?

Congratulations, P.A. Semi! It will be fun to see how this plays out.

Forbes article

Update: color analysis from Chris Edwards.

Stop Me Before I Schwag Again

Just got back from the TSMC Technology Symposium. I'll think about what I can share from that always-valuable event. But what I have on my mind, in the wake of Earth Day, is the schwag that us engineers accumulate, and how we just can't stop it!
  • Another conference, another tote bag. My closet is overflowing! And, another non-recyclable badge lanyard that will have to be thrown out. I wish that conference organizers would "think green" and give out less "junk", and distribute reusable or recyclable merchandise. Of course, I need to look in the mirror as well. Why can't I say "No" to this stuff? I'm making some progress in turning down trinkets, but it requires eternal vigilance.
  • Will engineers do anything for a T-shirt? Although I love them, my home is overflowing with shirts from vendors and from runs and rides that I go on. I've become more discriminating: a vendor's white t-shirt won't make the grade, nor will colored ones with a non-clever design. What I am amazed by is how easily I can give these shirts away to other engineers. I put a vendor's black t-shirt out in the break room with a "Free Shirt!" Post-It note. Within five minutes, it disappeared! I have successfully followed the mantra Reduce, Reuse, Recycle. In the words of Fake Steve Jobs, namaste.

Friday, April 18, 2008

DFM heads into the foundry

And we're back to the "Hacking Cough" blog for this analysis of DFM heads into the foundry. The post explains an innovative announcement from TSMC whereby they will offer as a service Blaze DFM's power & variation optimization capability. The innovative part is that instead of a chip design company buying the EDA tool, you pay for it as a service from your foundry (exclusively TSMC at this time).

One thing I'd wonder about is how design teams can accurately convey their timing environment to TSMC (across all modes and corners) such that these optimizations don't break timing. Running sign-off STA is not quite as simple as "just send an SDC file over". :-)

Monday, April 14, 2008

Good Blog, Odd Name: Hacking Cough

I've found a semiconductor blog to recommend, with the curious name of Hacking Cough. It's better than the name implies! One more salvo in the 32nm war is a nice overview of where IBM, Intel, TSMC, and others are headed with their 32nm process technology recipes, and their different approaches to solving scaling and power consumption problems.

Friday, April 11, 2008

NVIDIA Powers Hardware-Accelerated SPICE Simulator

The multi-core future of EDA is just starting to appear. NVIDIA Powers Hardware-Accelerated SPICE Simulator is an exciting announcement of a real EDA application (Fast SPICE) running on massively parallel GPU hardware. Will general purpose GPU (GPGPU) computing become the acceleration platform for EDA?

Tuesday, April 08, 2008

SNUG SJ 2008 Report

For my report on this year's SNUG San Jose conference, I'll point out the major themes that cropped up across multiple sessions. If you're a Synopsys customer, you can see all the papers and presentations at the SNUG web site.

Low Power Everywhere

Low Power support is becoming pervasive in design flows. Both in design and verification, tools are supporting techniques such as Clock Gating, Multi-Vt, Power Gating, State Retention, Multi-Voltage, and Dynamic Frequency and Voltage Scaling.

Of course, for an EDA company, this requires a new name to designate these new features. So, Synopsys is calling it their "Eclypse" flow. (Note the funky spelling to give fits to spell checkers everywhere.) I don't think this name matters much to ASIC engineers -- do you care what the "Galaxy" or "Discovery" platforms consist of?

DC Topographical Uber Alles

DC Topographical, which is Design Compiler's inclusion of "virtual layout" during synthesis, is becoming mainstream. The newest edition is DC-Graphical. It adds congestion reporting and optimization, and a GUI to help visualize and debug virtual layout-related issues. It certainly makes more sense than using traditional wireload models, though you could run into correlation issues if the virtual layout floorplan is very different from actual.

Blues Compiler Rocks

The biggest treat of SNUG was the first public west coast performance of Blues Compiler, Synopsys' house band. To be honest, I hung around to hear them play out of curiosity. I figured it would be a bunch of guys who used to play in college and still liked to goof around with their instruments. Boy, was I in for a pleasant surprise! Featuring CEO Aart on electric guitar, and "Diva" Joanne W on vocals, this band absolutely rocked! They sounded very professional and played a number of sweet electric blues/rock songs. I'd compare their sound to Janis Joplin's, who I am a big fan of. Absolutely recommended to check out if you get a chance. They usually play at Boston SNUG, and I hope they'll be back in San Jose in the future.

A review of the performance would not be complete without a nod to the "Solid Gold" Marcom Dancers, who succeeded in getting a bunch of engineers in a banquet room dancing to the tunes. Quite an accomplishment. I was impressed and hope to get dancing lessons from "Crazy Legs" Shankar H in the future.

Thursday, April 03, 2008

Synopsys to Acquire Synplicity

I had missed the news of Synopsys to Acquire Synplicity, Inc. until Aart de Geus mentioned it in his SNUG keynote speech.

Sounds like Synopsys is pretty interested in Synplicity for the "rapid prototyping" capability to check out ASICs before taping them out. The price wasn't too high, either.

I sat with a couple of FPGA designers at SNUG lunch and they spoke highly of Synplicity's FPGA synthesis -- definitely superior to what one can get through the FPGA vendor. With better quality of results from Synplicity, designers may fit their design into a smaller FPGA part, which saves big bucks in production.

Low Power Sessions at SNUG 2008

I was at SNUG, the Synopsys Users' Group, for the past three days. It was an excellent and very practical conference, as always. I will post more of a trip report soon, but one of the big themes was Low Power Design and Verification. Synopsys' low-power point man and blogger, Godwin Maben, even gave a general session (keynote) speech on it.

Godwin has kindly compiled and linked to the list of low-power papers at this year's SNUG, which you can see in his blog post Magic Blue Smoke � Blog Archive � Low Power Sessions at SNUG 2008. Note that you must be a Synopsys customer (SolvNet login) to see the papers.