Scaling, Integration and the 3D Shuffle
Chris Edwards wrote a great look at the future of semiconductor scaling in
The 3D shuffle - Shrinking Violence Blog.
I'm seeing more and more about 3D packaging, using emerging technologies such as Through Silicon Vias (TSV). Might this solve some of the thorny integration issues people are expecting? If 3D is a good answer for Logic + Memory, it may also be a good match for CPU + GPU. Already, in the CPU space, we're seeing a fair amount of package-level multicore integration, rather than "natively" putting all the cores on a single die. For example, check out AMD No Longer Feels the Need to Go “Native” .
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