The crises are piling up — software and concurrency, analog/RF, die-package-board and die stacking — and with a fixed number of EDA R&D engineers, we need to stop working on some issues. In the big picture, who wins a power format or current-source model or process variation model war is less critical to semiconductor industry health than consensus, interoperability, and moving on to fundamental design technology challenges.
This is very consistent with the efforts of companies like TSMC to get the EDA industry working cooperatively to solve more problems and add more value, by reducing overlapping development.
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