Dilbert Channels Apple

Dilbert is poking fun at Apple Store training! Will this be the start of a series?

How does it apply to our world? "As it turns out, you can't get your data out of our EDA tool ..."

Twitter Primer

For several years, Synopsys has a group of folks participating in social media (blogging, tweeting, etc.). Why, they've even written a book about it!

If you've heard about Twitter but don't know what it's all about, here's their article to succinctly show you the answers: The Listening Post » Twitter Helps Engineers.

What tweets might you find related to EDA on Twitter? Here's a real-time display:

Architecting for Asynchronous Designs

I've long been fascinated by asynchronous logic design (filed under "magic they don't teach you in school"). And a startup called Fulcrum was one of the more successful at commercializing designs based on these tecniques. Recently, Intel acquired Fulcrum. Here, Ron Wilson shares some insights into what applications the asynchronous style excels at, and how to compose the solution play into its strengths: What is Fulcrum's real leverage?.

Steve Jobs' Partner in Design

Tech news has had a plethora of stories about Steve Jobs and Apple since Dear Leader announced he was stepping down as CEO.

The SF Chronicle has a nice profile of one of the less publicized but vitally important talents at Apple, the head of product design: Apple's product vision falls to Jonathan Ive.

Update: Perhaps the San Jose Mercury News follows my blog, because shortly after this post, the newspaper of Silicon Valley came out with their own profile of Mr. Ive, Apple's design wizard has not left the building - San Jose Mercury News.

Steve Jobs’s Best Quotes

In honor of Steve Jobs on the day of his resignation as Apple CEO: Steve Jobs’s Best Quotes - Digits - WSJ. I'm most inspired by the things he has to say about design, and life. And most amused by what he says about Microsoft.

CAD Engineers' Bookshelf Updated

Four years ago, I presented my original CAD Engineers' Bookshelf. I've put together an updated list here of the subset of books that I refer to most often. Since some titles have been updated, latest editions are listed here.

Another update since 2007 is that alternative formats are widely available for these books. You can go directly to the source at O'Reilly Media and purchase Ebooks formatted for all the popular e-readers. It's very convenient to be able to download formats that look great on your Computer, Kindle, or iPad.

Without further ado, here's the 2011 version of the bookshelf. It's all Perl, which is testimony to both Perl's power and it's inscrutability!

When Trolls Attack

Ever listen to This American Life? Ira Glass is a great story teller. This week's episode is very relevant to our industry.

It's on the long side. You can listen to it here, or do as I do and load it as a podcast onto your personal media player of choice. Then you can listen while washing the dishes, walking the dog, etc. Multi-tasking!

Who's your (least) favorite EDA/IP patent troll?

Art of Failure 2011

Enjoy the hauntingly beautiful chip photographs in Art of Failure 2011 - IEEE Spectrum.

Saluting the Father of our Foundry

A well-deserved congratulations to Dr. Morris Chang, recipient of the 2011 IEEE Medal of Honor. IEEE Spectrum magazine has published a fascinating profile of his professional life in Morris Chang: Foundry Father - IEEE Spectrum.

The article quotes numerous industry luminaries to frame his impact. It's hard to overstate what Dr. Chang's accomplishments have done for so many of the industries that we work in: fabless semiconductor, EDA, ASIC, ... I found the article to be full of fascinating tidbits, such as

• His first job paid $480 per month.
• At the beginning, he was a self-taught semiconductor engineer. He spent countless hours after work to learn about new fields.
• He was a highly successful TI executive before "starting over" to create a new industry from scratch in Taiwan.
• On several occasions, he left good companies when things weren't working out, with no immediate job prospects. He had the confidence that he'd find a good opportunity.
• Dr. Chang didn't become fabulously wealthy from founding TSMC! He's well-off, for sure, but a US executive would have made sure to ensure his success first.

Insanely Great or Just Insane?

A fascinating inside look at Apple and Steve Jobs' management style, excerpted on wired.com. The full article is available for purchase and download at Amazon.

I'm happy to be an Apple customer instead of reporting to Steve!

Intel to Sprout Fins

Wow, is "FinFET" happening already? It will soon, according to Intel putting fins on at 22-nm.

Intel will ramp manufacturing of these devices next year for their 22nm process shrink of Sandy Bridge CPUs. That appears to be a full process generation ahead of leading foundries such as TSMC, and the low-power advantage would help Intel become more competitive in the elusive mobile market.

Apple Tea Leaves, Viscera or Dark Matter

I'm not sure which is the right analogy, but in reading A5: All Apple, part mystery, I find this article to (1) be an interesting survey of the state of Apple silicon, and (2) an article that goes on and on but doesn't contain any factual information.

Apple's wall of silence is unprecedented in the industry. While much has been said about Steve Jobs' Reality Distortion Field, equally impressive is the control that Apple exhibits over employees and suppliers to suppress all leaks. Have you seen many Apple presentations at industry conferences?

Jean Jennings Bartik, a Computer Pioneer

Some pretty cool very early computer history from this obituary: Jean Jennings Bartik, a Computer Pioneer, Dies at 86 - NYTimes.com. Also, Jean Bartik on Wikipedia. Greatest Generation Pioneers, thank you for your contribution to the United States and the Computing profession.

Innovation In EDA

Each year, EDN magazine has a contest to select the most innovative electronic design products: EDN 2010 Innovation Award finalists:Are you inspired?

The nominees in EDA Tools and ASIC Technologies are

• Calibre InRoute, Mentor Graphics. (is this Mentor's answer to Synopsys IC Validator, a winner from last year?)
• DRC+, GlobalFoundries
• PathFinder, Apache Design Solutions
• SoftPatch for RocketVision, GateRocket Inc

Looking back at 2010 EDN Innovation Award winners, there were multiple categories of EDA-related awards, and thus many more EDA nominees. From each category, the winners were

• Quartus II Version 9.1 FPGA-design tool, Altera
• IC Validator in-design physical-verification solution, Synopsys
• Virtuoso Accelerated Parallel Simulator, Cadence Design Systems

Cooley's Take on IPO Candidate Apache Design

Props to John Cooley for his article looking at Apache Design's history and products. It's been 10 years since the last EDA IPO? Surprising and troubling. Let's hope it's less than a decade for the next one.

Email from John:

           http://www.deepchip.com/gadfly/gad031811.html

     INDUSTRY GADFLY: "A brief history of Apache and its IPO"

                         by John Cooley

  On Monday, Apache Design Solutions, Inc. (APAD) filed to IPO for
  $75 million as a publically traded stock on the NASDAQ.

  The last company to successfully IPO in EDA was 10 years ago.  It
  was Magma, which raised $63 million back in 2001....

           http://www.deepchip.com/gadfly/gad031811.html

RISC versus CISC, Who is #Winning?

As you may know, I have a soft spot for technology history. I loved going to HotChips and hearing all the old bearded geeks debate CPU architectures, and why x86 often wins despite its warts.

I was delighted to find this couple of blog posts by UC Berkeley Computer Science professor David Patterson, one of the giants of computer architecture (and founding member of the RISC Fan Club):

1. RISC versus CISC Wars in the PrePC and PC Eras - Part 1
2. RISC versus CISC Wars in the PostPC Eras - Part 2 - ARM Community

If RISC and CISC start to look more like one another as they steal good ideas from each other, the architecture won't determine the "winner". Rather, it will hinge on other vital issues such as process technology (Intel wins) and openness (ARM, MIPS lead here).

Finally, if I may add a sophomoric comment, doesn't Prof. Patterson's mug shot remind you of Patrick Stewart (Captain Picard)?

Books About EDA

I'm intrigued by EDAgraffiti, a new book on our industry and plan to buy a copy. See this good review by Clive Maxfield.

Before that, the only other book I had seen on EDA was about the start of the ASIC industry, Silicon Destiny: The Story of Application Specific Integrated Circuits and Lsi Logic Corporation, which is pretty hard to find.

"Hi, I'm a RealTime Designer. And I'm a DC."

Look what one can miss by not attending DAC! I didn't realize that Oasys put together a bunch of videos poking fun at Synopsys (and ripping off Apple's commercials). See Oasys' DAC videos. I would have liked some more inside jokes about the competition's shortcomings, but we get the general idea.

As a bonus, the well-produced DAC 2009 video features company executives in a music video with cheesy parodies of some classic rock songs. I'm amused, but Al Yankovic need not worry.

Props to DeepChip.com for leading to my discovery of these gems.

What's inside Verizon’s Apple iPhone?

Verizon's version of the iPhone is just out and a couple of "teardown" companies have already sacrificed samples to see what's inside. Steve Leibson has their parts lists at Teardown of Verizon’s Apple iPhone reveals chips used. Want to know how many and which ones? Want to see the video teardown? | EDA360 Insider.

Most Dominant Franchise in EDA

I got to wondering -- which tool has the biggest lock on a major piece of the EDA tool constellation? (I originally wrote "monopoly" instead of "franchise", but don't want to connote market manipulation.) From my perspective, three come quickly to mind

• Cadence Virtuoso
• Synopsys Design Compiler
• Synopsys PrimeTime

You may have other ideas, and I'd love to hear other nominations. Of these three, I think a good case can be made for Design Compiler having the strongest position. The other tools have large market shares, but also competition determined to make inroads.

Who might chip away at the synthesis gorilla? The old and new rivals are Cadence RTL Compiler and Oasys Real Time Designer. Just published on ESNUG is this "marketmonial" (I need a word for a marketing-inspired testimonial): DeepChip.com: "An Oasys RealTime Designer vs. SNPS DC-Topo/DC-Graphical benchmark . A couple of things that I especially like about Oasys' approach:

• If Oasys truly optimizes at a higher level of abstraction (physical feedback can change the way RTL structure is synthesized), then substantial performance advantage claims become believable
• It freely exports DEF and integrates with the physical design world. By contrast, DC Topographical/Graphical can't decide whether it wants to be complete physical synthesis or "PD-lite", not fully supporting or integrating with detailed physical design data. (RTL Compiler is open like the Oasys tool in this regard -- it interfaces with Encounter P&R tools using standard data exchange formats.)

Time will render the verdict, and the EDA battlefield is littered with past attacks on DC's franchise, but we need competition in all tool areas to continue advancing the state of the art.