Sequence CoolPower: SoC Power and Voltage Drop Optimization

Sequence CoolPower First with Comprehensive SoC Power and Voltage Drop Optimization; New Automated MTCMOS Power Gating Slashes Leakage up to 100X, CoolPower Reduces Voltage Drop Significantly with No Timing/SI Penalty is in the running for the longest-titled Press Release! The march toward low-power methodologies continues. While Vth optimization is localized and has few side effects, emerging techniques such as Power Gating have implications for design, verification, and implementation methdologies. I don't know how cleanly this works yet. Sequence is announcing a product to support this, and I imagine the big EDA players will address this as well. BTW, Sequence neglected to define MTCMOS. It stands for Multi-Threshold CMOS. The idea is that the regular functional transistors are low-threshold (high-speed, high leakage), but the power to these transistors is gated by a high-threshold transistor during non-operation or "sleep".