Technologists live for working on leading edge technology. TI killing off 32nm development is a major change in how it views itself and whether it will be able to attract the best and the brightest scientists in the future -- not to mention how the ones who do this there today must feel.
Now that is significant! Another IDM "throws in the towel" on doing all their own process and fab development. Will we be catching our breath at 45nm for awhile?
I thought these industry news groupings have a human editor, but it makes you wonder ...
You may have seen the story earlier this week about a "breakthrough" announced by HP researchers, which involved applying nano technology to semiconductors.
I was intrigued, and Googled around to find this analysis at the "ars technica" web site: Hewlett-Packard's FPGA research, and replacing transistors. This excellent article explains that the HP announcement is for a very specific (and limited) application: FPGA interconnect. And it points out that the more promising HP announcement actually came out in 2005, which pointed to use of nanotechnology for circuit switching, not just interconnection.
Gotta love this web site's tag line: Serving the PC enthusiast for over 6x10-2 centuries!
In the news today is the much-talked-about list of 100 Best Companies to Work For 2007 in Fortune magazine.
Hmmm, the companies that we typically work at didn't fare too well. I only see a couple that would typically have ASIC or EDA engineers:
As far as high-tech, there are a lot more software companies listed, and many related to health care.
It would great if EE Times did an industry-specific version -- Best Places for an EE to Work For!
I was fortunate to hear Dean Newton speak at a "Berkeley in Silicon Valley" lecture last April. My notes from that lecture note that "synthetic biology", the application of engineering to living organisms (on a nano scale), was one of Dr. Newton's current passions, and his family requested donations in his name to the Berkeley Center for Synthetic Biology.
Update: John Cooley's Memories of Professor Richard Newton.
Poke around his web site to get a feel for what he writes about. It's a good reference. And, sign up for his newsletter to get his periodic thought-provoking missives. Happy Holidays!
One of the more common parts of my job is to figure out why something stopped working, or why it is suddenly producing different (namely worse) results than before, when "nothing's changed". Things like
For all of these sorts of things, I end up comparing logs, netlists, scripts, etc. I am the tkdiff master! With my eagle eye and understanding of the personalities of EDA tools and companies, it's a sleuthing challenge to find the culprit.
If I tried to explain this to a layman, I'd have to say that part of my job is playing the grown-up version of one of my daughter's favorite games, Spot the Difference. Yes, that's what I went to all those years of college for. :-)
NVIDIA launched their new graphics chip architecture, the chip code-named G80. Check out these reviews of how the performance blows away yesterday's best graphics.
This page has the G80 Hardware Specs. How about 681 million transistors?
The architecture is very interesting and different from past GPUs designed by NVIDIA or ATI (AMD). Rather than dedicated compute engines for different stages of the "graphics pipeline", this new architecture has scores of 1.35 GHz streaming processors that can be assigned to the most demanding graphics tasks for a particular game or scene. Because of this generality, it can be applied to completely new problems, as described in ExtremeTech's article:
As you might imagine, this will be aimed at highly parallelizable compute tasks, such as scientific computing, financial analysis and oil exploration. Nvidia will actually be offering a C compiler to facilitate thread computing, so programmers interested in general-purpose programming with the GPU don't have to be locked into Direct3D semantics. -- GeForce 8800 GTX: 3D Architecture Overview
So, I trudged over to the online documentation and was happy to find the Tool X Quick Reference manual. I figured it'd be a couple of pages long and I'd print it out and keep it next to my computer.
Well I was shocked (shocked, I tell you!) to find that the "Quick" Reference manual is 86 pages long. Something is seriously wrong with your product or your tech pubs when this happens.
What do you think? Are you surprised that a tool could be so inscrutable? Is it just that the writers don't understand what Quick Reference means? And, can you guess which tool I'm referring to? (I'll post the answer later.)
April Fools in October? I thought I must be reading a joke: in Life without Dataquest, Gabe Moretti reports that research firm Gartner Dataquest has dropped coverage of the EDA industry, and laid off reknowned analyst Gary Smith and his colleagues.
This is disturbing. I don't like changes like this! Dataquest (and Gary) have been covering the EDA industry for many years, providing analysis and prognostications, that, agree with them or not, were a starting point for debating the direction of EDA technology.
Let's hope that Gary and crew resurface to share their wisdom and opinions again. Best wishes to them.
10/25 Update: see the "backstory" and lots of comments from EDA industry personnel in John Cooley's article on Gary Smith's departure.
At my previous company, the lifetime projected volume of the ASIC we were designing was around 50,000 units. Yet, the ASIC vendor had to provide significant complex IP and especially engineering headcount to shepherd the chip to the prototype stage. Unfortunately, the market changed and that chip never made it to production. Sorry, ASIC vendor!
No wonder that most ASIC vendors are having a very tough life, with rising costs and declining design starts (and especially, fewer designs going to mass production). Contrast this with foundries such as TSMC, which get the customer to do all the IP integration, implementation, and verification, and the foundry can just focus on selling wafers. No wonder this model is eclipsing the ASIC model.
ICCAD-2006 is coming to San Jose this November 5-9 and the early registration deadline is TODAY, October 18.
Registration reveals a major benefit of IEEE or ACM membership: you get a discount of over $100 registering for the full conference!
I feel like I should be a member of the IEEE. I am, this year. Throughout my career, it's been an on-again, off-again relationship. Even when my company reimburses me, sometimes I feel that it's not worth it.
What do you think about the IEEE? Do you belong? Why or why not?
Come on, Gabe, tell us what you really think about the IEEE DASC: EDA DesignLine | EDA standards development within the IEEE is mismanaged
It's quite an indictment about what ought to be one of the most prestigious standards bodies related to EDA.
I know that most EDA vendors have groups whose full-time responsibility is the care and feeding of standards groups. In an ideal world, they'd be ensuring the most elegant and implementable open standards. The Internet standards bodies seem to be a fine example of this, and have delivered interoperable standards that spurred an incredible information revolution over the past decade. Why can't the EDA industry have that, too?
In reality, the EDA vendors do quite a bit of political maneuvering and intrigue. For example, we might only have to deal with one HDL if Cadence had opened up Verilog before VHDL emerged. Imagine the tremendous resources spent on VHDL that could have been saved. We almost had two library standards because Synopsys wouldn't open up the "Liberty" format until there was a revolution brewing to move the industry to DCL/ALF formats. You've never heard of DCL and ALF? Well, Synopsys finally opened up .lib and no one needed those alternate formats.
Anyways, getting back to Gabe's post, it's sad how quickly the proposed low-power standards are degenerating into political battles between EDA companies, much like the CCS vs. ECSM library standoff. Cadence's initial proposal sounded pretty reasonable, though perhaps I'm naive to think that they and Synopsys could have agreed on a common standard.
By the way, the EDA blogs I follow seem awful quiet! Are people burned out after DAC? Or is summer over and it's time to get back to work?
But, on the professional blogging front, a shout out to Gabe Moretti, who is editor at EDA DesignLine, a new web site of the CMP tech publishing empire.
I'm initially puzzled when an EDA vendor fields a new tool to take on Synopsys PrimeTime, e.g., Incentia Timing Analysis and Constraint Management Software Adopted by Ambarella.
PrimeTime is one of Synopsys highest-quality, most trouble-free tools. The main gripe I have with PT is that it can only tell you about timing problems -- it doesn't fix them! Hence, a cottage industry of home-grown scripts and supplementary tools exists to take PT reports and generate ECOs to fix the violations.
However, some of the features in this TimeCraft tool sound pretty attractive, and give me second thoughts about assuming nothing can beat PrimeTime. Attractive features include
