But upon a little more reflection, I have to agree with Larry Dignan of ZDNet that AMD’s triple core chip is a nice intersection where engineering meets business savvy.
Of course! It's not a three chip design. It's the four-core Phenom chip with one defective core disabled. AMD gets to salvage a "non-prime" part, and the consumer should get a good deal on a CPU that's better than dual-core.
This is a nice side benefit of highly-parallel designs, as long as they're designed to degrade gracefully.
1 comment:
That's interesting - I guess it's the natural extension to the concept of 'speed binning', which is an age old practice in the test sector of this industry. So now we have 'functionality binning'. I wish the same could hold true for communications chips: "well one of the transmit channels doesn't work, so would you settle for three channels?"
hee hee
JMF
Post a Comment