I haven't done a thorough survey of the language, but a few of the things that will help Design/Synthesis are:
- Interfaces (objects that define ports (and even protocols) between designs)
- Explicit treatment of intent for case statements
- Explicit treatment of intent for always blocks
Is Synopsys undermining synthesis standardization? Gee, they'd never do that. ;-) Looked at from the perspective of protecting their franchise, they have the most to lose from making designs portable. We've the same types of battles over library standardization (finally, Liberty) and a synthesis subset for Verilog HDL.