Monday, June 13, 2005

ATI, Cadence and TSMC Produce X Architecture Chip

The X Architecture initiative, an early example of which is described in ATI, Cadence and TSMC Produce Industry's First Fabless X Architecture Chip, is based on a straightforward idea: rather than run all the wires on an IC horizontally and vertically (Manhattan routing), devote a couple of layers to routing diagonally at 45 and 135 degrees. It allows you to "cut the corner" and routing distances become shorter. I think the biggest challenges to making this work are on the manufacturing side, which is why there's been heavy involvement from foundries like TSMC and semiconductor equipment manufacturers. I first heard about the X Initiative when Simplex Solutions and Toshiba were working on it several years ago. Cadence acquired Simplex, and this technology is starting to be introduced commercially now. UPDATE: This article has more technical detail.

1 comment:

Leo Butler said...

Pictures, damnit! Why couldn't they post one lousy picture of the interconnect?

I hope there's a technical presentation soon from some of the implementation folks that allow us to learn about the real-world trade-offs they encountered.