An Awesome DATE Report

Peggy Aycinena has written a very detailed and well organized report on DATE, which is the European equivalent of DAC. Read it all here: EDACafe Weekly : DATE 2006: Between Gem�tlichkeit und Angst - March 13, 2006

Furthermore, she refers to the very impressive keynote address by Mentor Graphics' CEO:

** The keynote address delivered on Tuesday morning at DATE by Dr. Wally Rhines, Chairman and CEO at Mentor Graphics and Chair of the EDA Consortium (EDAC) was nothing short of a magnus opus. Rhines simply said it all - simply.

As an aside, I've never met Peggy, though I recognize her name as a long-time EDA analyst and commentator. This column was the first time I've seen her picture, and I can't help but be struck by her resemblence to Arianna Huffington! (And I mean this in a complimentary way.) Separated at birth? What do you think?

IT Jobs Migration: Fears vs. Reality :: AO

IT Jobs Migration: Fears vs. Reality :: AO is a thoughtful, even-handed review of the job dynamics of the Information Technology field. It refers to an in-depth report by the Association for Computing Machinery (ACM), "Globalization and Offshoring of Software".

I'd assume that the analysis of the IT field applies to the closely related engineering fields like hardware and software engineering. Let's hope that the conclusion is correct, that an open market benefits both developed and developing nations. I'm sure this is true on the macro level, but we must keep an eye on those directly affected by outsourcing -- do companies invest in "new business opportunities to generate more new job"?

RapidChip R.I.P.

Being modest, I hate to say "I told you so", but LSI scraps ASIC line, plans to sell DSP unit seems consistent with the doubts about RapidChip that I expressed in this post in July 2005. Is there a stampede for the doors? A pioneer in the field of "structured ASIC", Lightspeed Semiconductor, exited the market just last month.

Too bad, I was sort of longing for the simple days of yesteryear when we did Gate Arrays, and these products resembled re-warmed Gate (or Embedded) Arrays.

SystemVerilog, a better RTL

I'm looking forward to being able to use SystemVerilog for Design (synthesis). Looks like this effort is picking up according to EETimes.com - Vendors warm to SystemVerilog

I haven't done a thorough survey of the language, but a few of the things that will help Design/Synthesis are:

• Interfaces (objects that define ports (and even protocols) between designs)
• Explicit treatment of intent for case statements
• Explicit treatment of intent for always blocks

I'm sure there are many more. I look forward to trying it.

Is Synopsys undermining synthesis standardization? Gee, they'd never do that. ;-) Looked at from the perspective of protecting their franchise, they have the most to lose from making designs portable. We've the same types of battles over library standardization (finally, Liberty) and a synthesis subset for Verilog HDL.

The 9-in-1 Wonder Chip

I don't get all the hype about the IBM/Sony/Toshiba "Cell" chip: The 9-in-1 Wonder Chip - September 5, 2005

Sure, I can believe it's a very fast, efficient CPU, with provisions for multi-processing. But IBM is betting its whole computing future on it? And how could this be so revolutionarily different from anything that all the other genius CPU designers have come up with, including AMD and deep-pocketed Intel?

I don't get it, but I'd like to. What's so different?

Engineers' pay will fall

Talk about "tough love"! This letter to EE Times, Engineers' pay will fall, presents a reasoned analysis of the dynamics affecting an Engineer's career, particularly in the US.

He has a very concise analysis of the reasons that Law and Medicine seem to provide more lucrative, secure careers now that "The World is Flat".

He doesn't dump on engineering and say to never pursue it as a career, but you need to go into it with your eyes open and priorities straight.