The Future is Multi-Threaded

Richard Goering's article Synopsys pledges multicore support for EDA applications covers the current state and future claims for multi-threaded EDA products. Synopsys has made a big announcement about a multicore initiative, and Richard also notes the vendors (mostly startups) who are already offering such products.

I hope that Synopsys isn't just blowing smoke and will deliver multi-threaded applications in 2008. I'm no software engineer, but I thought it would be pretty difficult to retrofit multi-threading in these gargantuan EDA products, some of which have been around for many years.

We really need multi-threaded applications. Most servers have multiple CPUs with multiple cores each, yet are limited by memory as to how many EDA processes can run at a time. Often, you can only run one job because you need all the memory on the server to synthesize or place & route that design. Multi-threading should deliver greatly accelerated performance as those other idle cores contribute to the job at hand.

Some of the terminology gets confusing. In this article, "multi-threaded" and "multicore" are seemingly interchangeable. And then there is "distributed processing". I think of multicore as describing the hardware (CPU), and multi-threaded as describing the software architecture that includes shared memory access. And "distributed" means running on different physical servers, with separate memory models. Do I got that right?

SNUG San Jose is Coming

The 2008 edition of SNUG (Synopsys Users Group) San Jose is coming March 31 - April 2, and registration is now open.

This is one of the most useful conferences if you use any Synopsys tools. The papers are very practical, and you can meet engineers who are doing real hands-on ASIC design. The Synopsys tutorial and product updates are very professionally done, and presented by their "star" CAEs who really know the products. The panels can be good, though they're usually not as spicy as the inter-company debates at DAC or the dog fights that John Cooley sets up.

Hope to see you there!

Aart de Geus Profiled in IEEE "The Institute"

The IEEE's monthly newspaper, The Institute, features Synopsys CEO Aart de Geus for its monthly "member profile". The article recognizes both his business accomplishments in founding Synopsys, and his significant community support, especially in the area of education. See Aart de Geus: At the Heart of High-Tech.

It's an Analog World, After All

Until new markets like DFM and ESL take off, the big EDA vendors are going after Cadence's Virtuoso franchise for Analog/Mixed Signal design. This has been a safe haven and cash cow for Cadence.

While I've caught mentions of Synopsys working on an analog design product, Magma has been the most forthcoming so far. Last week at MUSIC (Magma Users' Group meeting in San Jose), they announced

• Titan, an Analog design entry system. See Magma Introduces Titan -- First Platform to Combine Full-Chip, Mixed-Signal, Analysis and Verification for IC Design and a video interview Cooley does Rajeev on his new Titan.
• Acquisition of Sabio, an Analog "process migration" tool. See the press release Magma Acquires Sabio Labs, Enhances Titan Mixed-Signal Design Platform.

Titan  is at first glance a "me too" product, though attractive if it offers better integration, performance, and pricing. Sabio has a lot of grand claims from Magma -- if they deliver, this technology could be very valuable to customers.