Come on, Gabe, tell us what you really think about the IEEE DASC: EDA DesignLine | EDA standards development within the IEEE is mismanaged
It's quite an indictment about what ought to be one of the most prestigious standards bodies related to EDA.
I know that most EDA vendors have groups whose full-time responsibility is the care and feeding of standards groups. In an ideal world, they'd be ensuring the most elegant and implementable open standards. The Internet standards bodies seem to be a fine example of this, and have delivered interoperable standards that spurred an incredible information revolution over the past decade. Why can't the EDA industry have that, too?
In reality, the EDA vendors do quite a bit of political maneuvering and intrigue. For example, we might only have to deal with one HDL if Cadence had opened up Verilog before VHDL emerged. Imagine the tremendous resources spent on VHDL that could have been saved. We almost had two library standards because Synopsys wouldn't open up the "Liberty" format until there was a revolution brewing to move the industry to DCL/ALF formats. You've never heard of DCL and ALF? Well, Synopsys finally opened up .lib and no one needed those alternate formats.
Anyways, getting back to Gabe's post, it's sad how quickly the proposed low-power standards are degenerating into political battles between EDA companies, much like the CCS vs. ECSM library standoff. Cadence's initial proposal sounded pretty reasonable, though perhaps I'm naive to think that they and Synopsys could have agreed on a common standard.
