Thursday, September 25, 2008

Top Semiconductor Infrastructure Stocks

Bullish on EDA? Check out Sramana Mitra's list of Top 9 Semiconductor Infrastructure Stocks.

I was surprised to see her put EDA companies at the top of her list, since she's described the EDA business model as "broken". It seems a combination of low share prices and the potential for industry shake-up through merger or LBO has attracted her to these companies.

Tuesday, September 16, 2008

HOT CHIPS Distinguished Panel Video

As an addendum to my report on the HOT CHIPS conference, I'm posting this link to the video highlights of the distinguished panel. [courtesy of IEEE Spectrum]

It was a thrill to see these giants of computer architecture talking informally and good-naturedly about the greatest hits and misses in microprocessor design. There were several references to the nearly perfect inverse relationship between architectural elegance and market success. That's right, they talked about the x86 architecture quite a bit.

Friday, September 12, 2008

Today in Semiconductor History

Chris Edwards' blog post the chip industry's quiet celebration salutes the innovations of our forebears and notes the "creative destruction" that's always been part of our industry.

Wednesday, September 10, 2008

Big Brother is Watching, and It's Fun

I'm at CDNLive (Cadence Users' Group), and consistent with Cadence adoption of new technology to support users, the conference features new intelligent name badges from nTAG Interactive.

"Name badge" is too mild a description for it. Each attendee gets a device the size of a large remote control with a lanyard. Besides having a traditional name tag sticker, the device functions like a dedicated PDA for the conference. It's chock full of features:

  • Display of your personal conference itinerary. You know which session to go to at what time, and the paper abstract and speaker info is displayed on your nTAG screen.
  • Updated conference schedule. Did presenters cancel or were new ones added? nTAG displays the current agenda.
  • Social Networking! This is a fun feature. You hold up your device in front of another attendee's, and the screen displays something that you have in common (same business market, same hobbies or musical interests). And, at the push of a button, you can exchange business card information. After the conference, I'll be sent a report of all the people I met and a pointer to each session I attended.
  • Online survey submission. After each session, we can rate it with a few clicks on the device. No paper required.
  • A "points" system to encourage networking, filling out surveys, and attending the vendor expo. It's natural to see if you can earn more points. In this conference's case, earning enough points can get you a seat at tonight's poker tournament.

Overall, this gadget is pretty popular with attendees. We're all engineers, so we picked it up quickly and are happy to push all the buttons and explore the features.

What's sneaky is that I'm sure all this data is being transferred back to Cadence for some big-time data mining. They'll certainly track which sessions were attended and get the survey results. What else will they look at? Who networked with whom? I just hope they aren't tracking bathroom breaks. If my device lights up where I expect privacy, it's going down!

Friday, September 05, 2008

What's Hot at HOT CHIPS

I attended HOT CHIPS 20 on August 24-26 at Stanford University. HOT CHIPS' emphasis is more on computer server/system architecture than chip implementation. It's a nice small conference.

What follows are highlights of my conference notes. For more information, try to get a hold of the presentation copies, or attend next year's conference!

  • x86 ISA is dominant for general purpose computing. (Interestingly, the x86 ISA was designed in a rush at Intel in a few weeks, to plug a product gap that they had. Not an elegant design intended to last for 30 years!)
  • Multi-core is here today and used everywhere. (see Day of the Multicores) The jury is still out on how efficiently it can be used by software.
  • Low Power design techniques are everywhere.
    • CPU architectures are changing for low power. Less speculative execution because abandoned computations waste power.
    • Clock gating is common at multiple levels
    • Dynamic Voltage and Frequency Scaling (DVFS) is used in many chips.

Press Coverage